Sr. Electrical Engineer, SMPS, Power, Analog, sensors & interface, Dig

Ron Davison

760-***-****

PROFESSIONAL STATEMENT:

●Sr. electrical engineer, system & circuit designer uses creativity, resourcefulness, & deductive logic to quickly create circuits/topologies or solve issues with products, specifications, & interrelationships to requirements.

●Contextual & detailed oriented from trivial to complex interrelationships.

●Passion for efficiency & accuracy, in search of a team of engineers transforming exceptional execution of work into designs creating value, where little or none existed before.

ACCOMPLISHMENTS, INVENTIONS, INTELLECTUAL PROPERTY & PATENTS:

●7,869,176 Surge Protected Power Supply Surpassed DO-254 EMI/EMC high voltage pulse testing by 3x for safety critical systems in aircraft. Novel integrated passive + active circuit design for lightning protection surpassed (750 Volts) requirement; withstood over 20 consecutive lightning pulses with increasing voltages beyond 2500 volts.

●9,014,944 Turbine Speed & Vibration Sensing System Speed sensor amplitude detection to ensure safe margin to ensure proper engine speed. This solved single point of failure requirement deficiency via monitoring. In addition, by using an ADC & software, amplitude fluctuations caused by vibration or malfunctions are possible by selecting modes & inferring severity level. This novel design allows improved safety & reliability, with only a circuit upgrade & no mechanical changes, allowing increased safety of legacy aircraft & reduced maintenance costs. (Millions/year industry wide possible.) Allowed increased safety level from C to B via monitoring of single point of failure.

●Conceptual innovation of novel power supply IC being released in spring of 2017.

● million dollar savings projected on common controller family. Conceived LCCC carrier applicable industry wide.

●Intrinsic safe design of sensor instrumentation & wireless radio node to IEC/UL60079 C1D1 explosive environment.

●Utilizing PV peak power tracking, obtained the highest efficiency possible utilizing novel topology of dual ideal diode or-ing PV and battery augmented wireless sensor node used in IEC/UL60079 C1D1 explosive environment.

●Conceived and validated 1% higher efficiency AC-DC converter topology. (Efficient Electronics)

●20+years progressive responsibility improving & developing commercial, avionics, & military products. Design, optimization, validation & verification, manufacturing engineering, & research & development.

● Skills encompass MCU & FPGA based systems in: RF, sensor & sensor circuit design, calibration & error reduction, digital logic, Timing generators/oscillators/clocks, precision analog, ultra low noise circuit design, EMI mitigation & reduction by design, high efficiency AC-DC & DC-DC SMPS, electro-magnetic circuit design, thermal & mechanical packaging with design solutions encompassing all requirements.

●Increased SNR of (4 Kelvin) FLIR, between 2 and 100, (security level not sufficient to be told value of improvement.)

PROFESSIONAL EXPERIENCE:

GOODRICH AEROSPACE-UTC 06/2015-Present (Contract Aerotek)

●Avionics product circuit development, power topologies, input filters, and EMI design.

●EMI principle test and redesign responsibility for digital electronic controller for an APU.

●Lightning protection switch simulation, novel circuit conception & optimization for higher threat protection levels. Resulted in 2x to 3x higher threat levels obtainable.

●Motor drive design requirement deficiency review, capacitor survey and thermal testing study.

●Isolated power supply simulation and redesign options for lower conducted and radiated emissions.

●Input power and filter analysis, identified deficiencies and provided recommended design options to solve.

COBHAM AEROSPACE 01/2015 – 04/2015 (Contract Zoom Technical)

●Avionics RF communication engineering product development, circuit development, troubleshooting of manufacturing issues to component, process, or engineering deficiencies. Problem identification, Provide options & ECR generation.

●uP Validation uncovered scan mode non-functioning Guard channel design issue at critical 156 MHz band.

MAGNETIC SENSING 11/2014 - 01/2015 (confidential)

●Designed sensing circuits for measuring magnetic fields without direct contact with current source.

●Low noise reference with high PSRR, gain stage with ability to suppress (absorb-sink-source) line reflections between driver and remote ADC. Allows conversion to current driver as well with optional components and topology cooked into present topology PCB design.

●Increased SNR, reduced saturation in existing design, design allows separate Vcc for separate stages allowing larger dynamic range and higher SNR over existing design.

●Designed voltage sensing concept allowing compact design to add voltage sensing to current sensing circuit.

EFFICIENT ELECTRONIC SOLUTIONS; Power Electronics, R&D Engineer, 07/2013-11/2014, (See below also)

●Input power protection Hold up, & novel power conversion topology conceived, Bidirectional boost and/or buck. (IC Being released 1st quarter 2016.)

●Electrolysis hydrogen production PWM current source development & system refinements.

●LED driver topologies for low cost and size implementations. Lower cost, higher reliability LED driver designs.

●Conceived, and reduced to practice, control IC, startup power, turn off circuit. Additional modification of turn off circuit provided improved PF at 240 and 277Vac, producing best in class PF across universal input range of any PFC/PWM produced to date. Poor PF as line voltage increases is an issue with all universal PFC circuits in use today. Efficiency improvement of 0.5% to 30% possible, with varying output power levels & dimmer control techniques used.

●Novel Battery topology design improves power density and cycle life. Aplicable technology from utility scale battery to implantable battery design, providing exceptional cycle life.

●Novel PV power utilization technique improves overall system efficiency from 4% to up to 20% with specific conditions.

PHILIPS, COLOR KINETICS; SMPS Electronics Engineer, 05/2013 - 07/2013 (contract, Imperial Staffing)

●60W PFC AC-DC & DC-DC quad output with all permeations of Clors WRGB via output voltage changes. Allows common PCB with only a few component changes needed to base design. Schematic captured in Altuim.

●Novel ultra efficient power supply topology design for AC & DC-HV-LEDs. RGBW quad output single stage PFC allows any color combination.

●White paper written for new techniques to improve efficiency of LEDs & the high efficiency SMPS that drive them.

FREEWAVE WIRELESS; Principle Analog Engineer, 03/2012 - 10/2012 (contract, Carlton International)

●Negotiated product design, requirement derivation, specifications between sales & engineering.

●Identified implied requirements; envisioned base design to surpass requirements.

●Intrinsic safe design per IEC/UL 60079-0, subsections 1 to 11, & 25 for explosive atmospheres.

●MCU/memory/analog selection; novel battery charging and battery sourcing topology for PV & battery operated wireless sensor node. This allowed the highest efficiency possible, maximum power tracking input while high surge non-linear load voltage compliance with tri-bred topology. Temperature measurement and protection and charge control built in for multiple battery chemistry capability, Li-Ion, LiFPO4, Ni-MH.

●Conceived multiple hybrid dual source DC-DC topologies to maximize (soft source) PV power utilization & minimize battery cycling (maximize battery life) while regulating high-compliance output voltage. Redundant 1-to-N, independent batteries with bidirectional charging & sourcing, mixing of rechargeable & non-rechargeable batteries in agnostic, redundant battery charging and sourcing topology = highest efficiency & reliability & MTBF design.

●Corner case identification-mitigation in design, marketing specification issues identified.

●Designed power budget database to allow parametric design trade-offs.

HOBART CORPORATION; Sustaining Engineer 10/2011 - 3/2012 (contract, Black Diamond)

●Root cause analysis of solenoid coil failures; multiple solenoid design improvements & system level solutions identified.

●Cheapest improvements incorporated by supplier. Tested new design for differential performance; zero failures during worst case testing (vs. old design control sample that had 80% failure rate.)

●Researched & tested new permanent magnet motor selection.

●Identified software & hardware improvements for current measurement & SOA margin.

●Single event upset & interrupt experiments investigated/correlated with software team.

TAVIS CORPORATION; analog, digital, hardware design

Staff Electrical Engineer: 9/2009 - 3/2010 (contract, Oxford); Sr. Design Engineer, (permanent) 3/2010 – 4/2011

●Investigated/rated analog/digital temperature measurement circuits for accuracy & system integration costs.

●Using this knowledge with companies strategic & capability constraints implemented the system architecture & circuit design for a hybrid, MCU-assisted digital calibrating analog transducer. Conceived & designed multiple topologies for final selection of contract design. Digital accuracy enhancements, redundancy features, health monitoring, temperature correction, remote digital calibration adjustments; used in space & undersea pressure vessels. 8, 16, & 32-bit Microcontrollers investigated: ARM (Ti, ST, MicroSemi SmartFusion)

●Designed novel self-correcting, multi-mode redundant, frequency ratio pressure measurement, self-calibrating, cross-correlating correction/fault id via MCU. Allows for rate of change frequency ratio accelerometer functionality.

●Using switched, capacitive & inductive measurement circuits, provides accuracy improvements of 2-4x, improving latency by 1 to 2 orders of magnitude, & continuous measurement output 2 to 4 orders of magnitude. Via leveraging duals & continuous computation to measure real time frequency & continuous calibration. (Using matrix techniques & charge measurement techniques).

●Novel oscillator circuit improves start up time 4 orders of magnitude. Improved efficiency, higher Q. increased output amplitude level, lower supply voltage, THD, sub-harmonic & harmonic reductions are possible. Design allows optimization of one to all as needed, reduced frequency drift, higher clock frequencies via reduced jitter.

●EEE Space & Nuclear component selection, radiation tolerant parts & usage.

PACIFIC SCIENTIFIC; Sr. EE, Analog, digital, hardware design 01/2009 - 5/2009 (contract, Survival Systems)

●Circuit design engineer for microprocessor based digital generator control unit (DGCU).

●Implemented circuit improvements for susceptibility & EMI failures. Redesigned board to improve layout so as to cancel inductance & lower EMI to allow passing qualification testing.

HAMILTON SUNDSTRAND; Sr. EE, Analog, Digital, DC-DC Systems Integration 09/2005 - 10/2008 (contract, CDI)

●Responsible engineer for DO-254 based Boeing 787 Dreamliner; redundant MCU/FPGA-based turbine engine controller for analog & safety control logic design. Managed testing compliance & conceived redesign decisions.

●Technical team lead & solution provider on multi-corporate failure investigation team. Identified fuel module lightning protection circuit failure mechanisms. Identified solutions to implement. Schematic designed, optimized & simulated in spice with Cadence.

●Patent: (7,869,176) & Patent : (9,014,944). (See 1st bullets above)

●Novel capacitive bridge common mode cancellation circuit in capacitive oil level LRU.

●Novel Proportional Hysteresis Comparator (PHC) circuit increasing SNR up to two orders of magnitude. Removes compromise between low-speed minimum signal strength & high-speed SNR/noise immunity.

●Novel single and multi-point voltage monitoring circuits to mitigate undetected, single point of failure in circuitry. Allows smart monitoring of dynamic & static conditions of amplitude and periodicity relative to application periodicity & anomalies related and unrelated to application, allowing predictive signals just below circuits ability (@ requirement limit typically) and allow system to react to reduce risk dynamically with or without pilot input.

●On Digital Electronic Controller (DEC) for APS5000-787, APS2300, & APS500 programs created power electronics design improvements: DC-DC soft switching, asymmetric (fly-back) gate drive. Modification allowed passing radiated emissions for Safety of Flight (SOF) testing. Improved transformer winding design. Input voltage derived variable frequency feed-forward technique allowed improved load & input voltage range from 3:1 to 7:1, while protecting volt-second limit of transformer.

●Designed isolated driver for fuel solenoids for common mode rejection requirement of fuel pump ground based lightning switch & spatial grounding point differences. This creates voltage offsets up to 750-volts.

●Optimize/verify analog & digital circuits using best method between testing, analysis, & Pspice simulations.

●Critical Failsafe Logic: conceptual & design input incorporated into FPGA; this is used to meet DO-254 level A safety critical fault tree requirements.

●Developed & decomposed requirements from system level requirements; invented, developed, & deployed new circuits to meet or exceed these requirements.

●Supported EMI testing & incorporated solutions into new PWB layouts.

●Discovered problem & suggested circuit changes to improve static & dynamic (dv/dt) voltage levels on sub-contractors Exciter-igniter & lightning protection circuitry. Lead Engineer @EMI lab when subcontractors lightning protection switched failed (when they failed to heed my advice mentioned above).

●Legacy product failure analysis & investigation; suggested corrective actions for implementation in both manufacturing methods & electronic design. Identified solder fracture mechanism & conceived of novel adapter applicable to LCCC packages; projected savings of million dollars in one program alone. Applicable to all industries using LCCC ICs. Directed mechanical engineer at aerospace connector & IC socket company to CAD design

●Directed/guided offshore, onshore, senior, junior, system analysts & technicians in support of above project goals.

EFFICIENT ELECTRONIC SOLUTIONS; Power Electronics, R&D Engineer, 06/2001 - 09/2005

●Novel power electronic topologies that boost efficiency over standard solutions employed in industry.

●1% higher efficiency PFC AC to DC boost topology invented, reduced to practice, with verified measurements.

●Ongoing product & component research of existing & new components toward use in better products.

●Developed forward predicting signal analysis software. (1st for finance, yet applicable to data acquisition systems as well)

SEMTEK; Development Engineer 3/2001 - 6/2001

●Micro controller, magnetic reading hardware. USB, RS232, & SPI interface.

●Circuit design, schematic capture, & PCB design.

ECTRON; Project Engineer, 1999 - 2000

●Increased power & susceptibility levels; improved resolution/transient response in PFC, DC-DC, & AC output stages.

●1.5KVA variable voltage (0-280Vac), Variable frequency (45-450 Hertz), instrumentation AC power supply reliability & performance upgrade with an 100% power surplus. Allowing for release of 2500VA product changing 3 components.

●Designed novel five-stage startup circuitry limiting inrush current.

●Changed enclosure & improved layout for RF susceptibility & emissions.

●Reduced temperatures of critical components at full load using FET’s, IGBT’s, transformers & increased airflow.

●All three-stages & cross-stage propagation failures eliminated.

●Eliminated DC-DC failure mechanism using peak current mode control; new transformer design to accommodate additional volt-seconds & peak current, bringing transformer design to UL & VDE.

TRANSISTOR DEVICES; Electrical Engineer, 3/1999 – 6/1999

●Responsible design engineer for multi-stage, multi-output 375-watt power supply with battery backup.

●Electrical design of 250-watt saturable magnetic PWM control module, battery charger.

●Mechanical design of PCB’s & heat sinks for heat transfer requirements.

XENTEK; Electrical Engineer, 10/1997 - 3/1999

●Team leader on 600-watt, PFC, DC-DC four-output power supply. Designed start-up & housekeeping 6-watt fly-back power supply with discrete under voltage shut down.

●Leading edge saturable reactor regulator designed & tested.

●Synchronous rectifier designed & tested.

●Prototyped 300-watt quad output power factor corrected power supply. Model matrix creation & documentation.

ELGAR; Electrical Engineer Associate, 12/1996 - 10/1997

●Sustaining engineer for Smartwave 3-phase programmable AC or DC output power supply product line.

●Analyzed defective assemblies to determine failure modes; requested component, engineering, &/or manufacturing changes to eliminate failure mechanisms & meet specifications.

●5-Kw precision analog electronic load, high slew rate, large power bandwidth electronic load: 0 to 400 mho’s in ~3 microseconds 400V@12.5A to 8V@ 600A; used for solar power simulation of space based PV systems.

HUGHES AIRCRAFT COMPANY; Development Engineer, 6/1986 - 9/1989

●Four degree Kelvin FLIR interconnect techniques improved SNR between 2x & 2 orders of magnitude, using 1st principles. (Confidential clearance, needed Secret clearance to be allowed to be told exact improvement level.)

●Conceived & designed low-cost, wet/dry wire testing machine with valid statistical sample size. This allowed statistically valid # of samples at one time. Simultaneous mechanical fatigue testing of insulation & conductors to contaminants & solvent exposure with cycle count to failure of each sample was accomplished.

●Analyzed & modified drawings, designs for compliance to contract requirements & design for repeatability in assembly, process analysis in terms of quality assurance, & MTBF.

●Designed experiments of normal & defective equipment to determine defective assemblies root causes using destructive & non-destructive test procedures.

●Wrote, revised procurement, testing, & process specs toward very high reliability products that exceeded EEE space & avionic requirements.

ITT GILFILLIAN:

Methods Engineer, harness & cable designer, Electronic Technician, Fail safe design interlock power system.

●Methods Engineer, harness & cable designer, Electronic Technician, Fail safe interlock design of power system.

Software: LTSpice, Eagle, Altuim, Cadence, Dx-Designer, Mathcad, Matlab, Excel, Office, C, Assembly, Fortran

Education & Affiliations:

●220+ university credits to date (COC,SMC,CSUN,SDSU)

●College degrees (2): Associate of Science SMC, Electronics COC

●Communication Systems Professional Certificate (Spring 2002); DSP, data compression, digital & analog modulation, modem design, radio receive architectures.

●Hybrid Vehicle team SDSU, only EE in M.E. run Challenge X competition. Variable diameter wheel invention

●Focus of Study: Microprocessors, instrumentation, control systems, power electronics, digital communication, advanced differential equations, Fourier analysis, transmission lines. Power electronics topology invention, Class D amplifier ideation, (1995) variable RF power rail ideation, Etched silicon gate channel ideation (1990-92) Thermal & optical concentrators, Photovoltaic’s & BOS power design

●2 courses away from 2nd degree triple Minor BS in interdepartmental studies: Energy Studies, Mathematics, Industrial Technology, (Searching for homes for all my extra classes I had acquired through the years as employment-residence-universities changed.)

●IEEE & SAMPE member

●EIT California Engineering license Number XE093244.

Ron Davison 760-***-**** ***.*.*******@*****.***

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