***** * ***** *** ***** #****

Yalun ZHANG San Diego, CA, 92130

Mobile: 617-***-****

Email: acy023@r.postjobfree.com

SKILLS

Analog Circuit Design: Cadence Virtuoso

PCB Design: Altium Designer, Cadence OrCAD

Products Verification: Oscilloscope, Function Generator, Signal Source Analyzer, Spectrum Analyzer, Vector Network Analyzer, Power Suppliers, LabView

Software Programming: Xilinx ISE, C, Java, Verilog WORK EXPERIENCE

Product Engineer Intern at Integrated Device Technology, San Jose, CA July.2015 – Sep.2016

Validate AC/DC Performance on new chips of different font with designed boards, debug onboard circuit issues and present characterization reports with tested data analysis, such as Signal Integrity, I2C Readback, LDR, Current, Phase Noise etc.

Design/debug dedicated board and PCB Layout board for lab testing demand and create BOM files for internal components storage management.

Test features of Versa Clock (Programmable Clock Generator) products with industrial condition to check spec value of VOH/VOL, Cycle-Cycle Jitter, Slew Rate for LVDS/LVCMOS/HCSL/LVPECL terminations and update datasheet for customers like IBM, Panasonic, Cisco etc.

Generate evaluation and characterization plans for new products and coordinate failure analysis with Design, Marketing and Application team.

Lab Assistant at BU ECE, Boston, MA Sep.2014 - Dec.2014

Mentored students with course Analog VLSI circuit design in design schematics, layout, simulation and analysis of simulation results by using Cadence Virtuoso; setting up and performing lab RF measurements Supplier Quality Engineer Intern at ZF (China) Investment Co., Ltd, Shanghai, China Sep.2012 - June 2013

Analyzed supplier’s performance through monthly Key Performance Indicators(KPIs)

Assisted in Lab-testing of Suppliers’ products quality utilizing SAP and other quality tools

Conducted several APQP and 8D training sections for employees in China Quality Assurance Engineer Intern at Shanghai Volkswagen, Shanghai, China June 2012 - Aug.2012

Testing of the electrical parts of Autos from assembly line; Statistical analysis of test results PROJECT EXPERIENCE

Programmable Clock Generator Characterization Test Board PCB Design March 2016

Schematic and PCB layout design of the testing board for a 32-pin package VC6+BAW clock generator chip.

Design purpose is to check if a BAW (Bulk Acoustic Wave) resonator has better phase noise performance.

Designed a 4 layer PCB board with 5 inch trace for differential outputs. 1-GHz PCB FM Receiver (Team work) Oct. 2014 - Dec. 2014

Designed schematics and PCB Layout, and hand-soldered PCB board with components to implement the design.

The design includes an antenna, 1-GHz low noise amplifier, mixer, local oscillator, IF amplifier and filter, and FM detector, as well as a headset or audio amplifier to assess the baseband audio signal strength and quality. Design of an RF Synthesizer (Individual) Dec. 2014

Designed an Radio Frequency Synthesizer with a sinusoidal output at 5GHz

Designed quadrature VCO, a phase detector, a charge pump and loop filter and the buffer which finally achieved the circuit lock from 560ns.

Design of a Current Mirror Op-Amp (Individual) Apr. 2014 - May 2014

This three stage op-amp was designed on schematic level using 0.13um CMOS technology.

Used Cadence tool to run the simulation for the circuit and achieved a 40dB gain with 9.7mW power consumption. Design of “Rhythm Master” Game by Verilog and FPGA board (Team Work) Mar. 2014 - May 2014

Saved programmed melodies into SD card about 20 - 30 seconds and corresponded the rhythm with the speed of falling block on the screen to get scores by pressing four arrows in keyboard.

Using FPGA board user can start and pause the game or choose the difficulty of the game. Design of a LNA (Low Noise Amplifier) and Layout with IBM 8HP Technology (Individual) Feb. 2014

Designed 4.5 GHz cascade low noise amplifier on both schematics and layout (including DRC,LVS,QRC).

Minimized the noise while keeping a high gain of LNA about 20dB. EDUCATION

Boston University, College of Engineering Boston, MA Master of Engineering in Electrical Engineering Sep.2013 - Jan.2015 GPA: 3.58/4.0

University of Shanghai for Science and Technology Shanghai, China

Hamburg University of Applied Science Sep.2009 - June 2013 Double Bachelors of Science in Electrical Engineering PERSONAL

Language skill: Mandarin, English, German Hobby: Piano, Oil painting Social Activity

Volunteer of World Expo 2010 Shanghai China Sep.2010 - Oct. 2010

Contact this candidate