RESUME

KASSAM MADHU Email id: acxtvw@r.postjobfree.com

Phone : +91-779*******

Objective:

Seeking a Challenging position in the Organization and to work with an organization where my technical capabilities and personal skills are fully utilized for the progressive growth of the Organization and the individual.

Education:

Qualification

School/Institution

Board/University

Year

Marks

B.Tech (ECE)

VEC, Kavali

JNTU, Anantapur

2015

73%

Intermediate

(M.P.C)

Svj college, porumamilla,kadapa

Board of Intermediate Education, AP

2011

81.5%

SSC

Vijaya high School,

Porumamilla,kadapa

Board of Secondary

Education, AP

2009

80%

Technical skills:

Programming Languages : C,Verilog,System verilog,uvm methodologies.

Electives : Digital design,Analog electronics,Pcb Designing.

VLSI Tools : Xlinx, Modelsim, Quastasim,Microwind,Dsch.

Protocals known : Amba,GPIO

Achievements & other Curricular:

Event organizer in my school and college annual day functions and other technical events.

My team got g a 1st prize on cricket at college level tournament.

Presented a paper on “Satellite communication” in KL University,Vijayawada.

Presented a project on “In &out counter” in techno exhibition

Strengths

Innovative.

Hard Working.

Zeal to Learn New Things.

Adaptable to any Environment.

Academic Projects:

Project Title : An Area Efficient Low Power Tg Fulladder Using Cmos Nanotechnology

Tools used : DSCH,MICROWIND

Description :

This project presents an area and power efficient technique to design a full adder, using transmission gate and 2:1 multiplexer in order to reduce transistor count. Two full adders have been designed using 10 transistors with XOR and XNOR cell. The full adder using 10 TG XOR consumes power and area respectively each.

Project Title: Router 1X3 Design

Software : Modelsim,Quastasim.

HDL : Verilog,System Verilog.

Description :

In this project Router design, By using verilog each and every module in router can be designed and also finally done top module for all the modules in router also testbench should be done successfully and observe the functionality . And The router1x3 also verified by using uvm methodologies. In this this functionality of router was check without any distrub the source code and also functional coverage was done 100 percent .

Personal Profile:

Name : K.Madhu

Father’s Name : Sreenivasulu.k

Date of Birth : 05-06-1994

Gender : Male

Nationality : Indian

Languages Known : English, Hindi and Telugu.

Declaration:

I hereby declare that the above mentioned information is correct up to my knowledge and I bear the responsibility for the correctness of the above mentioned particulars.

Date :

Place : Bangalore (MADHU.K)

Contact this candidate