PHILLIP TRAN
Morgan Hill, CA ***** 408-***-****
************@*****.*** https://www.linkedin.com/in/phillip-tran I am an experienced New Product Introduction / Manufacturing Engineer with extensive expertise in taking new designs from engineering prototype stage into full production for several multi-billion dollar platforms including Unified Computing Services (UCS) C-Series rack servers and B-Series blade servers, Mini UCS, switches, IO modules, Mezz cards, and PCIE cards.
• DFM best practices • DFT best practice • Agile PDM/PLM
• Schematic review • MFG assembly and test processes • JTAG program
• Valor DFM tools • ICT program • Cost reduction
• NPI Process • ECO release • Debug
KEY HIGHLIGHTS
Understands system hardware architectures, design concepts, and engineering development practices.
Understands Intel server hardware architecture (ie. CPU, memory, I/O, PCI-E, RAID).
Experience and understanding of various product development processes (hardware products - in- house design, OEM, ODM/JDM, and software).
Experience with CAD tools, such as Allegro, and PCB DFM tools, such as Valor.
Good understanding of PCB fabrication process and technology.
Good understanding of the end-to-end process for PCBA assembly (Pb and Pb-free).
Works well in a fast paced team environment and can multi-task. PROFESSIONAL EXPERIENCE
Cisco Systems, San Jose, CA 2006-1016
ELECTRICAL PRODUCT ENGINEER/NPI ENGINEER 2010 – 2016
Support the development of new products by leading the manufacturing effort to define and drive design for manufacturing and test (DFM and DFT) with the goal of reducing the assembly and test time, and increasing the overall product quality.
Work with the Design Engineers, fab houses, and CMs to review and resolve issues on the designs prior to fab out the boards, closed the issues in less than 3 days prior to fab out the boards.
Review with buyers for cost avoidance efforts during the development process; Save $0.5 million per year on working with FAB vendor to redesign PCB’s panelization to maximizing raw material usage.
Manages technical changes to existing products through the ECO (engineering change order) process.
Provide hardware debug mentorship to contract manufacturing test engineers and debug technicians. Ensures that Manufacturing receives the required level of product training.
Analyze and drive all DFx requirements and items to closure throughout the product life cycle in order to reduce end to end costs for multi-million dollars and manufacturing cycle times.
Work with the design and manufacturing teams of vendors to drive a successful transition of the product from design phase to mass production phase for ODM projects. MANUFACTURING TEST ENGINEER 2006-2010
PHILLIP TRAN
Morgan Hill, CA 95037 Page Two 408-***-****
************@*****.*** https://www.linkedin.com/in/phillip-tran
Deploy Test tools to contract manufacturers and monitor yield during bring-up; Work with design engineers to review and recommend for DFT.
Program Agilent 3070 In-circuit tester to support production; Develop JTAG program to support engineering bring up new designs.
Collaborate with NPI team on daily yield reporting and performed FA on proto/pilot build. Assist contract manufacturer’s test engineering team to improve the test yield for production.
Build and maintain vendor relationship; Participate in site survey and suggest improvement to improve efficiency and quality; Participate in vendor capacity analysis; Second source additional vendors to meet peak capacity requirement.
Apple Computer, Cupertino, CA 2004-2006
IN-CIRCUIT TEST(ICT) ENGINEER
Development, installation, and production maintenance of Agilent 3070 equipment.
Interface with design engineers to review and recommend design modifications to improve product manufacturability, testability, and reliability.
Provide technical support for new products to manufacturing subcontractors. Pemstar Manufacturing, San Jose, CA 1996-2004
SENIOR TEST ENGINEER
Program Agilent 3070 and HP3065 systems to test PCBA in analog, digital, LSI, VLSI and boundary scan.
Perform technical support of PCBAs manufacturing including design/manufacturability review, tooling/fixture design and continuous process improvement.
Interface with customers to review and recommend design for testability; Review and improve test coverage on existing ICT programs.
Provide technical support for production, external partners and customer service engineers; Perform yield / failure analysis and developed corrective actions.
Train test and repair technicians on new products from system level troubleshooting down to component level using diagnostics.
ADDITIONAL PROFESSIONAL EXPERIENCE
Senior Test Engineer, Dovatron Manufacturing, Anaheim, CA Test Engineer, Western Digital, Irvine, CA
Engineering Technician, Powertec, Chatsworth, CA
EDUCATION
BS Electrical Engineering, California State University, Los Angeles CCNA class
JTAG training classes
Zehntel 850, HP3065, HP3070 training classes