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Test Cases Engineer

Location:
San Diego, CA
Posted:
November 26, 2016

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Resume:

Omprakash Yadav

**** ********* ***, *** *****, CA 92126 ~ 646-***-**** ~ acxnml@r.postjobfree.com

SUMMARY

A multi-skilled person, with 2 years’ experience in both manual and automation testing, proficient in C, C++, Perl, Python programming and developing test cases. Now looking for any challenging position, one which will make best use of my skills and experience that enhances my professional development.

TECHNICAL SKILLS:

Languages:

C, C++, STL, Shell script, PERL, Python, Verilog

Wireless RAT:

LTE, TDSCDMA, CDMA 1X, GSM, BT, Wifi

Networking Protocol:

TCP, UDP, ICMP, OSPF, BGP, MPLS

Tools:

QXDM, APEX, Iperf, Wireshark, Visual Studio, Cadence CAD, Xilinx ISE, ModelSim, Tetramax ATPG

CERTIFICATION:

Python for Everybody - University of Michigan (2016)

C++ For C Programmers - University of California, Santa Cruz (2016)

EXPERIENCE:

Software Test Engineer, Qualcomm Inc, San Diego, CA Aug. 2014 – Jun 2016

Performed manual/black box and automation testing of 6 different modem chipset software

Performed regression, functional and performance testing and bug fix verification

Reviewed the requirements, developed test plans, Execution, and debugging of issues

Executed test cases with eNodeB, call box, RF Channel emulator

Debugged split RF test between DUT and REF UE for different test scenario

Analyzed RRC, FW, L1 Layer logs for functional/performance verification, reporting issues

Worked with SW, system teams from bring up till post commercialization regression

Tested multi-SIM feature SR-DSDS, DR-DSDS for 4 different modems in TLG, G, W, 1X mode

Tested multiple feature requests for customer

Antenna Port Swap Testing for iPhone in TDS+GSM+LTE mode

Developed test scenarios to test the swapping of antenna based on algorithm

Reported multiple crashes and many functional issues at different stages

Performed functional and performance verification under different scenario and channel condition

Verified the software build leading to success

Perl / Python Automation scripting

Developed PERL modules to automate the test execution, extract result statistics, pass fail analysis

Developed Perl system module to queue and run multiple test cases overnight that improved the test coverage in the regression testing

Developed Python parsing script for log analysis and KPI

LTE Release 8/9 Air Interface

Comprehensive knowledge of LTE network architecture and function of various nodes, different channels, UE Idle Procedures

RACH Procedures, Cell Reselection, EPS attach, CSFB

Good understanding of MO/MT Call Flow, Acquisition and Registration and RRC layers

Received LTE training from QUALCOMM wireless academy

Wireless Lab Engineer, NYU, Brooklyn, NY Sep. 2012 – Jan. 2013

- Performed Simulink simulation of 3 user DS- CDMA system, PN generator, and BPSK

- Performed lab experiments such as PN code generation, QPSK, BER Measurement, DSSS, FHSS, TDMA, Mixers

- Operated equipment such as RF Signal Function Generator, Spectrum Analyzer, Digital Oscilloscope

- Wrote C++ program to model the path loss

ACADEMIC PROJECTS:

LTE Handoff Sep. 2012 – Dec. 2012

- Prepared research report on LTE Handoffs

- Presented 4G LTE network architecture, RAN, Interfaces, different handoffs: intra & inter RATs

- Awarded excellent report of the class in “LTE Handoff” by Prof. Ted Rappaport

4 bit ALU (Arithmetic & Logic Unit) Design Nov. 2013 – Dec. 2013

- Designed 4 bit ALU, capable of performing 13 different arithmetic and logical operations

- Completed schematic, layout design, functional verification, satisfying DRC and LVS

Trivium Stream Cipher on Spartan-3E FPGA Board Nov. 2013 – Dec. 2013

- Implemented the Trivium Stream cipher algorithm in VHDL

- Performed functional and timing simulation using the test vector provided

- Implemented the model on Spartan-3E FPGA Development Board with proper operation

Test Pattern Generation Scheme for Sequential Circuit Nov. 2013 – Dec. 2013 - Designed Random vs Deterministic Test Pattern generation scheme to detect all stuck-at faults for Sequential circuit

- Performed Test Pattern Generation and Fault Simulation with/without Scan F/F using Synopsys Tetramax Tool

- Compared parameters such as Fault coverage, Test Time, No. of Patterns, Total no of faults, Fault class statistics

EDUCATION:

NYU Tandon School of Engineering, Brooklyn, NY May 2014, Master of Science, Electrical Engineering, GPA: 3.1

University of Mumbai, Mumbai, India June 2010, Bachelor of Engineering, Electronics & Telecommunication, GPA: 3.5



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