Charmi K. Toliya

# ***, *** **** ****,

*th Cross, Kundunahalli, BEML Layout

Bangalore (Karnataka., INDIA) - 560037

Email-id : acxfz0@r.postjobfree.com

Mobile No.: 094********

Mobile No.: 070********

EXPERIENCE

Graduate Apprentice Trainee Bharat Electronics Ltd. Feb-2015 to Present

I am currently working as Trainee in CRL-SOC department at Bharat Electronics limited, Bangalore. As Part of my job I amworking on IP verification, AMBA Protocol and AMBA designer tool (corlink) and writing test bench for IPs. Currently I amworking on DSI MIPI IP. Trainee Verification Engineer SION Semiconductor

Dec-2015 to Present (Weekly Classes)

I had enrolled as Trainee verification engineer at SION Semiconductor. As part of my training I worked on VGA controller. I have experience in verilog HDL, System verilog and writing test bench for digital circuits. I have also knowledge of UVM, ASIC verification and Physical Design concepts. ACADEMIC DETAILS

Examination University Institute Year CGPA/%

Bachelor of Engineering :

Electronics and Communication

Engineering Gujarat Technological University GEC Bhavnagr 2015 8.06 Diploma of Engineering :

Electronics and Communication

Engineering Gujarat Technological University OSDEC 2012 8.90 Secondary School Certificate :

SSC G.S.H.E.B Kanya Vidhayalaya 2007 68.15

FIELDS OF INTEREST

Digital Design, ASIC Design, Verification, Physical design STRENGTHS

Positive Attitude, Eager to Learn, Social Interaction, Hardworking, Innovative. TECHNICAL SKILLS

Languages : Verilog, System Verilog, C, Embedded C, Assembly 8051

Script: Perl

Operating Systems: Linux, Windows

Tools: Xilinx ISE, Modelsim, Questasim, Corlink AMBA Desiner, MATLAB, Keil Vision

Knowledge of : VLSI concepts, Physical design concepts, DRC, LVS MAJOR PROJECTS

Verification of DSI IP using system verilog (At Bharat Electronics Ltd.)

Objective : Verify DSI IP and its functionality using system Verilog.

Tools & Skills : Questasim, system Verilog

VGA control and monitor using verilog (At SION Semiconductor)

Objective : Implementing VGA controlling and monitoring using the verilog HDL and its interface to FPGA.

Tools & Skills : Xilinx ISE, Modelsim, Verilog

Accident alert System (At GEC Bhavnagar)

Objective : Intelligent accident alert system which notify the distance between two objects. Microcon- troller (8051) is programmed using embedded c in keil Vision4 to measure the distance of objects and displayed it on seven segment LED. Applications are in Car, Robots, Train etc .

Tools & Skills : Keil Vision, Embedded C

Automatic Railway Crossing System. (At GEC Bhavnagar)

Objective : Microcontroller is programmed to sense the input from the IR sensor and accordingly output is send to stepper motor to perform the action of closing and opening the gate.

Tools & Skills : Keil Vision, Embedded C

OTHER PROJECTS & LAB EXPERIMENTS

Writing Test bench for Basic gates in System Verilog

Implementation of Digital circuits like adder, subtractor, Decoder etc in Verilog

Implementation of Digital Modulation schemes using MATLAB

1-bit Calculator using 8051

CERTIFICATES & ACHIEVEMENTS

Poster Presentation : Won 3rd Prize in Poster presentation at Om Shanti Engg. College.

Badminton Tournament : Won 1st Prize in Badminton Tournament at SREZ-2012 Personal Detail

D.O.B : 6th Aug 1992

Gender : Female

Nationality: Indian

Marital Status: Single

Languages Known: English, Hindi, Gujarati.

ABOUTME

Sincere in attitude and result oriented, showing Commitment and creativity in achieving the results. DECLARATION

I hereby declare that the above mentioned information is correct to its very extent with hard form of the proofs available

Charmi Toliya

Bangalore

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