Engineering Engineer

Aravind Motamarri

https://www.linkedin.com/in/aravindmotamarri 755 E Capitol Ave,

240-***-**** ********@*******.*** Milpitas, CA 95035

CAREER OBJECTIVE

A graduate student with a year of professional experience in VLSI testing industry and zeal for adapting quickly to dynamic business environments seeking intern/full-time opportunity, where I can effectively contribute and develop my skills as a professional to the growth of the organization.

EDUCATION

MASTERS OF ENGINEERING IN ELECTRICAL ENGINEERING EXP. GRADUATION 2017

University of Cincinnati, Cincinnati, OH, United States. CGPA: 3.71/4

BACHELORS OF ENGINEERING IN ELECTRONICS & INSTRUMENTATION 2010 - 2014

Amrita School of Engineering, Amrita University, Coimbatore, India. CGPA: 8.1/10

TECHNICAL SKILLS

EDA Tools: Synopsis Design Compiler (Power Compiler, DFT Compiler and BSD compiler), Tetramax ATPG, Smartest.

Simulation Tools: SPICE, IRSIM, Multisim, MPLAB IDE, ModelSim, LabVIEW, MATLAB, Simulink.

Programming Languages: Verilog, System Verilog, VHDL, C, C++, Python, MATLAB, LabVIEW, Perl (beginner), SQL and SAS.

Layout editor Tools: Magic.

Operating Systems: Unix/Linux, Windows.

EXPERIENCE

TEST ENGINEER TESSOLVE SEMICONDUCTORS PVT LTD. Client: AMD 2014 – 2015

Worked as an ATAC (Advanced Test and Characterization) engineer in Carrizo project.

Involved in full Test flow and have sound working knowledge in:

oGenerating STIL files from a designer file.

oTranslating to tester specific files like .bin and. pof

oDebugging of level files, equation files and pattern files on different testers.

Modify the test program and test environment on Advantest Verigy 93k and Sapphire testers online as well as offline.

Worked on JTAG, MBIST, Scan Compression, ATPG, Fault Simulation and at-speed testing blocks.

Have working knowledge in fault modeling Stuck-at, Transition, Path Delay, IDDQ.

PROJECTS

Tool to perform Placement and Routing MAR 2016

Developed a C++ code for implementing Force directed algorithm to achieve optimal cell placement, based on wire length and Implemented Lee routing algorithm for two-layer routing.

Tool to perform balanced bi-partitioning of cells FEB 2016

Developed a C++ code for implementing Simulated Annealing algorithm to obtain an optimal partition.

Design, Logic Synthesis, Scan chain Insertion and Boundary Scan design for a GCD machine FEB 2016

Developed a VHDL code, synthesized using Design Compiler and inserted internal scan chains using DFT Compiler.

Created a boundary scan chain and implemented DFT approach that combines internal scan chains and boundary scan register (BSR).

Used Tetramax to generate test patterns for the GCD machine.

Fully Scannable array sorter NOV 2015

Bit-sliced design of 4-bit serial array sorter, using even-odd sorting algorithm for AMI C5 0.5u process and tested the chip at 25 MHz.

Low Power analysis for 30µm and 14nm technologies MAR 2016

Measured individual contributions of dynamic, short circuit, leakage using Hspice for different loads of an inverter (dummy circuit).

Dual-level power estimation and gate-level power optimization of GCD calculator MAR 2016

Measured switching activity at RT level and gate level, resynthesized the circuit using multi-threshold voltage libraries for min power.

Tool to extract, sort and republish the data for Websites(Python) Jun 2016

Developed a Python code for extracting necessary data (year, name, rank) using regular expressions from HTML file.

Dict (data structure) used to sort the stored data with respect to the key field(name), then combined the name with rank into one field and added to lists and returned to new summary file. Then shell commands like "grep" can be used to display the summary.

Tool for Copying and Zipping(Python) Jul 2016

Gathered a list of absolute paths of the special files (using regular expressions) in all the directories.

Created options to copy the files to a specific directory or zip all the special files using the list of absolute paths.

Tool to solve Puzzles(Python) Aug 2016

Each "puzzle" path URL in the log file is combined with the server name from the filename to form a full URL.

Replication is avoided and did custom sorting which yields a left-to-right order of image slices.

Image from each URL is downloaded into given directory. The browser displayed all the slices together seamlessly by placing image tags on the same line with no separation.

Student Information Database Nov 2015

Used MySQL 5.6 for developing database to store students contacts, course and residential information.

Developed ERD (Entity Relationship diagram) using Dia (graphic editor) and translated into RDB (Relational Database).

Implemented, populated and queried over the relational schemas.

Worked on creating tables, sequences, indexes needed based on Design.

Created SQLs with necessary joins and exported data into other formats(CSV).

Model-based fault detection and diagnosis of level control system 2013 – 2014

Worked with liquid level control trainer kit 313A, RS485 protocol and MATLAB for detecting Additive and Multiplicative sensor faults.

Professional Work, Responsibilities, Achievements & Honors

Authored an International paper on “Interfacing and PID control of Liquid Level in a Tank Using MATLAB” MAY 2014

ISBN: 978-93-84209-14-8

Industrial Training for different instruments used in Medium Merchant and Structural Mills, Vizag Steel Plant. JUN 2011

Lynda certification for Up and Running with C++, Python 3 Essentials, and Foundations of programming: Data structures. MAY 2016

Udemy certification for SOC Verification using SystemVerilog, SystemVerilog Verification -1: Start Learning TB Constructs, learn to build OVM & UVM Test benches from scratch, Learn SystemVerilog Assertions and Coverage Coding in-depth APR 2012

Worked as Technical head and organized workshop on Augmented Reality for our department in national level annual technical fest of Amrita School of Engineering(Anokha-14). FEB 2016

Awarded Gold medal twice for highest grade in 2 semesters in Electronics department. 2011 & 2014

Awarded Gold medal twice at inter-campus Table Tennis tournaments. 2010 & 2011

Received the University Graduate Scholarship (University of Cincinnati). 2015 – 2016

Contact this candidate