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Engineer Test and Manufacturing

Location:
San Jose, California, United States
Salary:
75000
Posted:
January 03, 2017

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Christopher Robinson

***** ***** **, *******, **. 94538 Email: acx3sa@r.postjobfree.com

Home: (510) ***-**** Work: (510) ***-**** ex206

Cell: (510) ***-****

OBJECTIVE:

A challenging position as a Test Engineer or Manufacturing Engineer, with a large organization utilizing my experience, while learning new skills.

QUALIFICATIONS:

Many years of experience in sustaining and new product development in both Manufacturing

and Test Engineering working in the medical, avionics, and telecommunications industries.

Very strong background in electronics, manufacturing, quality, and support functions.

Demonstrated strong leadership qualities and excellent interpersonal skills.

Known for facilitating quick resolution of problems through root-cause analysis. ( SPC )

Experienced in troubleshooting and developing tests for electronic assemblies. Expert in

ICT (HP3070), Boundary Scan, Flying Probe, DFM, DFT, and 5DXRAY. Very knowledgeable of

Win Runner, LabView, HP Vee, and VxWorks. Also an expert with oscilloscopes, logic analyzers,

BER (Bit Error Rate) testers, and other lab equipment. Includes the daily use of Unix and Microsoft

products such as Project, Word, Excel, Access, and Power Point. Also knowledgeable with RF, and

RF testing. Developed over 100 different ICT and programs and fixtures.

Experienced supervisor during new product introduction projects, yield enhancement projects, ESD

training/implementation, data collection projects, and manufacturing/production floor layout projects.

Strong problem solving skills, with the ability to improve processes.

Expert at developing tests for analog, digital, and mixed signal printed circuit boards.

Experience with Reliability Testing, Environmental Testing, and Four Corner Stress Testing.

PROFESSIONAL EXPERIENCE:

Venture Manufacturing Service, Newark, California Jan. 2016 to Present

Test Engineer

Maintain and Sustain test fixtures for testing various assemblies.

Maintain and Repair the In Circuit Test equipment.

Maintain and Debug the In Circuit Test Fixtures and Programs.

Debug and Repair Circuit Board Assemblies.

Alter-G, Fremont, California March 2012 to Dec. 2015

Test Engineer

Design, develop and build test fixtures/ procedures for testing various assemblies.

Coordinated emission testing (Radiated and Conductive) at approved laboratories.

Responsible for resolving ECO (Engineering Change Order).

Generate test protocols and the test reports. (OQ, PQ, and IQ)

Also responsible to be prepared for FDA and ISO audits.

Attend New Product Introduction meetings, and provide DFT and DFM feedback.

Using VSM (Value Stream Mapping) we went from producing 8 to 12 systems a week with

overtime, to producing 15 systems a week without overtime.

Philips Medical Systems, Milpitas, California Aug. 2003 to March 2012

Test Engineer

Design, develop and build test fixtures/ procedures for testing various assemblies.

Also developed automated test processes using LabView.

Generated and resolved ECR and ECO.

Generate test protocols and the test reports.

Also responsible to be prepared for FDA and ISO audits.

Attend New Product Introduction meetings, and provide DFT and DFM feedback.

Reduce test time and DOAs, while increasing test coverage.

Attended Green Belt Training, also completed Continuous Process Improvement projects. (CPI)

Kestrel Solutions, Mountain View, California May 2000 to June 2002

Test Engineer

Determined the Test Process and Test Methodology to be used for testing a PCB. Developed the

ICT, Functional, or System Test. Generated and released the Test Procedure to be used.

Provided leadership, and support for new product introduction, supplier selection, and product

transfer. The results were schedules were made on time, with all testing in place and released.

Provided technical training and sustaining support to in-house and contract manufacturing. The

results were reduced cost, improved quality and productivity was increased.

Coordinated all DFM and DFT with design engineers for Functional and ICT test. For ICT test the

results were increased test coverage from the low 80%, to the 96% - 100% range. For Functional test

the results were that the diagnostic abilities of the software was comprehensive and incorporated in

the Test Procedure. This was an invaluable tool for the technician when troubleshooting a problem.

Coordinated all ICT and LabView development. The results were that circuits with SOC ( System On

Chip ) and BIST ( Built In Self Test ) devices that normally would not get tested during ICT test,

were incorporated.

Designed test fixtures and developed tests for products that use RF, and run at OC-3, OC-12, OC-48,

Fibre Channel and GigE speeds. One result of my involvement was incorporating my background in

ICT to reduced a 30-minute semi-automated Functional Test, to a fully automated 8-minute test.

Beckman Coulter Inc. Palo Alto, California Nov.1984 to May 2000

Sr. Test Engineer

Generated, maintained and enhanced test procedures, for numerous products resulting in 50% lower

failure rates reduced cost, improved quality and increased productivity.

Wrote assembly and test procedures for products that require optic alignments.

Supported ISO and CE, by audits, writing and maintaining procedures per ISO and CE requirements.

15-year core team member for all new products.

Familiar with drives, vacuum and refrigeration systems, thermo electric modules, and control

systems. Also familiar with SMT, including fine pitch, and BGA devices.

Responsibilities include training personnel at different Beckman sites.

ATE Programmer

Responsible for purchasing, profiling, and programming Automatic Test Equipment used for testing

Analog, digital, and mixed signal printed circuit boards.

Knowledgeable in the testing of TTL, CMOS, and ECL digital devices, as well as OP Amps,

A to D converters, D to A converters, Microprocessors, and other devices.

Manufacturing Engineer

Collected data from the field and factory, and provide failure analyses. ( SPC ) Using data that was

collected I have corrected marginal design flaws, and marginal manufacturing flaws. Such as

mislabeled silkscreen markings for surface mounted polar capacitors.

Supported the production line, and provided trouble-shooting assistance and training. The results

were reduced cost, improved quality and productivity was increased. Plus some of the technicians

that I trained had better reviews because of their increased productivity.

Resolved issues such as obsolete parts, alternate sources, substitute parts, and other line engineering

duties. These products use Electrophoresis, Laser Diodes, Mirrors, Lenses, and Stepper Motors, to

test for Optical Density, Absorbance, and other medical terms. At times I have to re-engineer circuits

in order to get the new devices to work.

Fairchild Test Systems (Schlumberger), San Jose, California March 1980 to Nov. 1984

Test Engineer

Responsibilities include programming on 3 different ICT test systems. I have identified different

marginal design flaws during the development of some of my tests. The results were reduced cost,

improved quality and first pass yields were increased from 50% to 100%.

Responsibilities also include writing Test Procedures for Manufacturing and Incoming Inspection.

Ran the Metrology Lab in order to calibrate the Analog Reference Boards for the Series 80 Systems.

U.S. Navy Naval Air Station, North Island San Diego, California Jan. 1975 to May 1980

Avionics - Anti Submarine Warfare Technician

Responsible for operation and maintaining General Dynamic’s Hybrid Automatic Test Systems

(H.A.T.S.) to isolate bad components on the PCB. Also familiar with ATLAS programming.

Education:

Naval Air Station, Memphis, Tenn. 1975 - Basic Electricity and Electronics, Advanced Aviation

Electronics “A” School.

Naval Air Station, Miramar, Ca. 1976 – H.A.T.S. Operator and Maintenance School.

Fairchild - Testline 3000A/4000A Programming, Faultfinder 303/S Programming

HP - UNIX Basics/System Administrator Basics, HP3070 Fundamental/Advanced Digital Course

Mission College, Santa Clara, Ca.

Ohlone College, Fremont, Ca.



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