OVIDIU NASTAI

*** *********** *****, ******, *******, K2M 0A4, Canada

cell: 1-613-***-****

acx17t@r.postjobfree.com

A highly motivated engineer, skilled in embedded real-time software design/development and ASIC verification/validation. Specializing in ARM v7/v8 Architectures.

TECHNICAL EXPERTISE

Languages: ASM (ARMv7/v8, MIPS, PowerPC, SPARCv9, x86/64), C/C++, Visual Basic.

RTOS: VxWorks, QNX, LynxOS, MontaVista Linux, uClinux.

OS: Linux, Windows, UNIX.

Boot Loaders: RedBoot, U-Boot, CFE.

IP Protocols: Ethernet.

Bus Protocols: AXI/AMBA/AHB, PCI/PCI-X, CoreNet, MMC/SD/SDIO, I2C, SPI, UBUS.

Coherency Protocols: MESI, MESI+L.

ABIs: System V (ARM, SPARCv9, PowerPC, MIPS), x86/64.

HDLs: SysVerilog, Verilog.

FPGA: Xilinx, Altera(NIOS II Soft Processor).

Interests: RT Systems, BSP, device drivers, Kernel development, Boot code, RTL Simulators.

Lab Tools: Oscilloscope, Logic Analyzer, JTAG debugger/programmer.

Version Control: CVS, SVN, Git, Clear Case, Perforce.

WORK EXPERIENCE

Broadcom Corporation, Kanata, Ontario 07.12 – 12.16

Principal SW Systems Engineer

Pre-silicon verification as well as post-silicon validation for BRCM ADSL+ chips.

Low-level firmware development (Boot Code, MMU Translation Table Management, Exception Handling, Cache Management).

Endianess verification of the logic translation between Little and Big Endian devices and buses.

SW Reset sequences (Low or High Vector Reset, Secure or NonSecure Modes).

The development was done in ARM ASM for Cortex A9/A15/A53 MP, on Cadence NCSIM Simulator and ARM-based tool-chain (RVD 4.1, 5.x).

TrustZone OS port to a Cortex A9mp-based SoC: boot sequence, MMU configuration, exceptions, timers, Monitor Mode coding to provide with context-switch between Secure<->NonSecure modes).

Blinq Networks, Ottawa, Ontario 12.11 – 04.12

Senior SW Engineer

Marvel 88E6165 Layer 2 Switch drivers, for Nios II and ThreadX.

FPGA firmware on-field-upgrade, development.

Control application development (NMEA messages), targeting a Trimble chip (GPS).

The development was done on Altera Nios, in C, using GNU-based tool-chain. The SW platform was Altera's HAL OS, and ThreadX (ARM). The HW platform was a Design Art Networks (3-core ARM-based design), and Altera FPGA.

QNX Software Systems, Ottawa, Ontario 10.10 – 11.11

Senior SW Engineer

LED and Ambient Light Sensor device driver development for the RIM's PlayBook device.

SYS_CLK drift corrector development for the RIM's PlayBook device.

Low Power DDR thermal sensor device driver development.

Multi-core, Inter-process shared memory lock library implementation.

Board bring-up for the TI's OMAP5430 SoC (A15-based), on the TI's Innovator (simulator) tool.

The development was done on QNX's Neutrino OS, in C and ARM assembly using GNU tool-chain.

Broadcom Corporation, Montreal, Quebec 05.09 – 06.10

Principal SW Engineer

Boot Loader development and enhancements. Boot Loader porting to new chip designs: Broadcom's BlueRay and Digital TV solutions. The MIPS cores used were MIPS 24K/f and BRCM MIPS 4380.

UART-DMA block verification and bring-up. Designed/implemented/tested a device driver for the UART-DMA embedded host controller.

MMC/SD/SDIO and Interrupt Controller blocks verification and bring-up. Designed/implemented/tested a device driver for the MMC/SD/SDIO embedded host controller. SDIO Linux stack (kernel) porting/modifications to support Broadcom's implementation of the MMC/SD/SDIO standards.

The development was done on uClinux, in C and MIPS assembly using GNU tool-chain.

Freescale Semiconductor, Ottawa, Ontario 02.08 – 03.09

SW/HW Co-Simulation Prime

Supported the p4080 ROCOO (Random On-Chip Object-Oriented testing methodology) environment. Took ownership of the CoreNet BFM/ROCOO testbench. Supported and enhanced the testbench (SysVerilog), acted as a reference for existing functionality, was the first to test new RTL drops.

Developed tests (stimuli), to be run in the simulator (VCS) in order to test new-added features, and verify the integrity of previous releases.

The development was done using C/assembly/SystemC/SystemVerilog. The GNU/VCS tools were used to make simulation modules. The simulation environment provided with logs and wave files (.vpd/.fsdb), for interpretation of the transactions resulted on the interconnect.

Developed driver code for the PAMU (Peripheral Access Management Unit) block, a IOMMU enabling the p4080’s hardware virtualization features. Debugged and provided solutions for the address translation mechanism and the operation translation mappings, which were features of the PAMU block.

Developed verification code (kernel modules) for the p4080 model (cycle accurate Simics models), running on a Linux 2.6, SMP compiled. It was a SMP-oriented kernel module, scalable, using a producer/consumer thread scheme. The threads could bounce between cores, or be bound to a particular core. It provided with maximum stress for the data-path acceleration hardware and was useful to detect simulation model and software, issues.

The development was done in C and e500mc assembly, using GNU tool-chain.

Trigence Corporation, Ottawa, Ontario 04.06 – 01.08

Kernel Engineer

Kernel System Calls intercepts and library code optimization.

The development was done using C and assembly (x86, x86_64, AMD64, SPARCv9), on lab test machines (Solaris9, Solaris10, Linux RH9, RHE3. RHE4, SUSE10, Windows NT to Vista). The GNU tool-chain was used to make kernel modules and user mode libraries on Linux/Solaris. On Windows, the MS tool-chain (CL/NMAKE/MASM/ML64) from the PSDK/WINDDK was used.

The intercept code was carefully designed and implemented to add minimum overhead to the native system calls’ processing. System call interception in user mode was achieved by on-the-fly modification (code overwrite) of the application’s libraries (binary op-code injections to replace the original trap/sw interrupt op-codes).

Reverse-engineered Windows system libraries (ntdll.dll), and developed library intercept/code plant.

Ported from Win32 (x86) to Win64 (AMD64). Developed the architecture-specific assembly-level AMD64 modules.

Debugged and fixed customer issues in the Ottawa lab.

Soma Networks, Ottawa, Ontario 12.04 – 04.06

Linux Driver Specialist

Driver development for the Soma’s Macro Base Station.

The embedded development was done using C, on a 2.4 Linux Kernel. The GNU tool-chain was used to make kernel modules. The target was an embedded x86 platform.

Board bring-up of a new SoC (FPGA-emulated in the pre-silicon verification phase). The ASIC comprised an ARM926E processor, a ZSP500 DSP, and various AMBA peripherals (DMA, memory, interrupt, UART, Ethernet, GPIO, etc.). Developed drivers for ARM-targeted boot loader (U-Boot).

Produced diagnostic code for the different components of the ASIC – memory content verification, AMBA bus transactions, interrupt signaling. Used Logic Analyzers to provide with means for wave (signal activity) capturing and debugging.

Critical Telecom Corporation, Ottawa, Ontario 06.04 – 12.04

Embedded Software Engineer

Driver development for the Marvell’s Gigabit Ethernet Switch 88E6183, Marvell’s Gigabit Transceiver 88E1111, Gigabit Transceiver AM79C874 and the PPC405EP’s Ethernet MAC, for embedded Linux (MontaVista) platform. Driver code integration with the Level7’s Layer2 – Layer3 protocol SW suite. Linux Kernel modifications to suit Critical Telecom’s GEmini™ product needs.

The embedded development was done using PPC405EP assembly and C. The GNU tool-chain was used to make (ELF format) the kernel module.

For debugging, GNU DDD tool was used in conjunction with Logic Analyzers and Oscilloscopes.

Assisted the Architects, FPGA and Hardware Designers with diagnostic/debug code.

Tundra Semiconductor Corporation, Ottawa, Ontario 07.02 – 06.04

Embedded Software Engineer

Driver development for the Gigabit Ethernet, UART and MPIC blocks of the StrongPac companion chip (ASIC), on VxWorks and RedBoot. Completed the full development cycle of the device driver: Participated in Design Specifications, Design, Implementation, Platform Emulation (Pre-Silicon ASIC Verification) testing and Silicon Validation testing.

The embedded development was done using ARM XScale assembly and C. The GNU tool-chain was used to make down-loadable (ELF format) images.

For debugging, ATI’s ICE CodeLab tools were used in conjunction with HP Logic Analyzers. Xilinx’s Impact tools were used to download the RTL code into the emulation platform’s FPGAs.

In the ASIC Verification phase, waves would be captured on Logic Analyzers (xScale transactions, PCI/X transactions, etc), to assist with debugging.

Silicon (ASIC) Validation test development for the Tsi310 chip. The test suite for the Tsi310 chip, were developed around a set of APIs provided by the Agilent Technologies 2929A/B Exerciser/Analyzer cards. The Agilent Exerciser cards were able to fully emulate the behavior of standard PCI\X devices on a bus. In addition, they supplied with Logic Analyzer capabilities. Waves reflecting the ASIC (PCI/X) bus activity would be collected and compared against the (PCI/X) standards.

Silicon Network Access, Ottawa, Ontario 02.01 – 06.02

Network Software Engineer

Embedded driver development for the iFlow family of network processors (NPU).

Completed the full development cycle of the iPP (Packet Processor) device driver. The development phases included Requirement Specifications, Design, Implementation, Documentation (Design Specifications, User Programmer’s Guide, etc), Testing and Support.

The architecture of the iPP device allowed the use of a DMA mechanism for fast packet data transfer between the iPP device and Control Plane Processor (CPP). Consequently, the iPP driver had to handle DMA data buffer allocation, virtual<->address translation, data cache synchronization, specific to each supported platform.

The embedded development was done using Linux, LynuxWorks and C/C++. The GNU tool-chain was used on PPC750, i686, and SPARC machines.

During the pre-silicon verification, the RTL would be loaded onto an a FPGA-based platform, waves would be captured (DMA, PCI, other buses, etc) and looked up for S/W or RTL errors.

Participated in the Design sessions for the HW/SW interfacing.

SRTelecom, Kanata, Ontario 05.00 – 02.01

Embedded Software Engineer

Designed and developed the Network Management Agent (NMA) and Management Information Base (MIB), for the WL304 Wireless Loop project. The SRTelecom’s WL304 Wireless Loop offered a wireless access solution to the last mile of the local loop.

Designed and implemented the communication link between the SCC driver residing in the Ethernet card and the radio cards responsible for forwarding the IP packets to the IP wireless terminal.

The embedded development was done using VxWorks/C++. The GNU cross-compiler, Wind River’s Tornado platform and EST VisionClick tool-set were used to make, download, program the flash memory, and debug the system. The target was a MPC860 micro-controller.

Canadian Payments Association, Ottawa, Ontario 09.98 – 05.00

Programmer/Analyst

Responsible for the development (design, implementation, building, testing and Customer Support) of the Large Value Transfer System (LVTS) project. The LVTS was the mechanism whereby participating members (Financial Institutions) electronically exchanged items of significant value among themselves.

Developed the LVTS’s GUI using Visual C++, Visual Basic, and COM/ActiveX Components.

Modified the application’s features according to the customer’s specifications.

Implemented the security features of the real-time messaging system, using the Entrust API Toolkit for the encrypting/decrypting process and IBM MQSeries API Toolkit.

Provided technical support for users.

The environment consisted of PC's/ WinNT.

Belgian Thermal Treatment, Brussels, Belgium 09.92 – 04.96

Software Engineer

Designed, developed and tested real-time software for thermal process control.

The work consisted in developing mission-critical code for creation, execution and termination of oven-controlling processes, communication and synchronization between processes, communication with the environment, and process administration.

The development platform consisted of Sun UNIX/C.

Created a data base system to manage Quality Control using C++, Visual Basic, MS Access.

Participated to the implementation of the ISO 9002 System.

IZOMAC, Turda, Romania 09.90 – 01.92

Software Engineer

Developed real-time programs for controlling of thermal equipment.

Designed, implemented and tested library routines (hard real-time queuing mechanisms) used by dispatch processes.

The work consisted also in SW/HW integration and support for customer acceptance of the controlling software.

The environment consisted of HP UNIX/C.

EDUCATION 1985 – 1990

Masters in Mechanical Engineering, Technical University of Cluj-Napoca, Romania.

LANGUAGES

English, French, Spanish and Italian.

SECURITY CLEARANCE

Enhanced Reliability.

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