Data System

MOHAMMAD AKRAM

Email: *************@*****.*** Mobile: 964-***-****

**-*, ******* ******, *****.

Seeking a challenging position in

System programming/VerificatonENGINEERING

OBJECTIVE:-To secure a place in an esteemed organization where I can put all my best efforts to add value, at the same time continuously learning and become Highly competitive for future challenges. Driven, goal-oriented towards launching a successful career with a progressive organization that rewards initiative and superior performance with long-term opportunities for professional growth.

Core Skills

Technical Skills

C/C++ Assembly language

Hardware/Systems verification System verilog/VHDL/VERILOG

Systems Organization Networks

FPGA-High Speed Digital Design Digital Electronics

Communication Skills

Skilled at communicating complex ideas with audiences (technical and non-technical) using reports, maps, presentations and personal communication.

IT Skills

Conversant with:

Xilinx ISE 8.1, Model Sim 6.2, Questa sim 10.0b and lattice diamond 2.1

BasicQualification (MS Office, MS Excel, Power Point, Outlook).

Certifications

System Verilog using UVM 1.1 Design at Advanced level.

EXTRAMURAL ENAGAGEMENT

Actively participated in Youth Festival at state level.

Awarded the 1st prize in University for holding highest grade in an year in M.TECH.

EDUCATIONAL CREDENTIALS

2015

Master of Technology (VLSI DESIGN) from S.R.M UNIV, GHAZIABAD with 8.5 CGPA.

2012

2006

2004

Bachelor of Technology (Electronics & Comm. Engg) from R.B.I.T (U.P.T.U) 70 %.

Intermediate from G.S inter college with 70%

X Class (ssc) from Holy convent Higher sec School.

PROJECTS CARRIED OUT

1 I2C(INTER INTEGRATED CHIP) as a trainne in Xinoe system Pvt Ltd .

I2C is appropriate for interfacing to devices on a single board, and can be stretched across multiple boards inside a closed system. The two I2C signals are serial data and serial clock. Together, these signals make it possible to support serial transmission of 8-bit bytes of data-7-bit device addresses plus control bits-over the two-wireand explore.

Master transmit master node is sending data to a slave

Master receive master node is receiving data from a slave

slave transmit slave node is sending data to the master slave receive slave node is receiving data from the master

ii.Transmitting a byte to a slave

Fig.1 Mater transmitting

iii. Receiving a byte from a slave

Once the slave has been addressed and the slave has acknowledged this, a byte can be received from the slave if the R/W bit in the address was set to READ (set to '1'). The

Fig.2 slave receiving

Fig.3 Verification part of test bench

2 IEEE-PIT

Programmable interval timer(PIT) is simple timer to generate the periodic signal signal can be usefull in triggering the start of an Analog to Digital or Digital to Analog conversion, as a periodic system interrupt, or to synchronize the start of various other hardware processes

As a verification engineer. I have to make sure that project is successfully accomplishing the task.RTL CODES USED VARIABLE OF SYSTEM VERILOG DATA TYPES, IN DIFFERENT PARTS OF TEST BENCH

Firstly read the hardware specification, write ur verification plan start writing ur test cases of many modules. These modules uses technology of dynamic thread, intercommunication process, functional coverge and many other.

The verification part closely lies to hardware specification in order to do so ALL THE PIT Signals generate through simulator and passes to stimuli(TRANSACTOR) with respect to the constraints. Randamizing these values with the data scale of TWO STATE(0,1) in system verilog .final simulation done on window wizard to determine the correctness of DUT.

PROFESSIONAL EXPERIENCE

Worked with Xinoe system pvtltd, as as a trainee from January 2015 to July 2015 in software testing for description of hardware.

Design and implementation of RTL forms.

Hand on experience with tools such as QUESTA SIM 10.0B/ MODELSIM.

RESEARCH PAPER

1.NATIONAL CONFERENCE PAPER – (LOW POWER VLSI DESIGNING USING NON CLOCKLOGIC SYSTEM).

2.THESISPAPER-I2C COMMUNICATION PROTOCOL VERIFICATION IN WAVEFORM VIEW.

HOBBIES &INTERESTS

Date of birth : 9 April, 1990.

Languages Known : English, Hindi.

Love to travel, net surfing& cricket.

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