MADHURI H.S BELUGUPPA

Phone: +1-503-***-**** Email id: acwnug@r.postjobfree.com

LinkedIn: https://www.linkedin.com/in/madhuri-beluguppa EDUCATION

Master of Science (M.S.) in Electrical & Computer Engineering Sept2014 – Present Portland State University, OR GPA: 3.1

Courses: Digital IC Design-1, Digital IC Design-2, Microprocessor System Design, IC Technologies, ASIC designing, Low Power IC Designs, Formal Verification of hardware/software systems, System-on- Chip designs with FPGA’s design with Programmable Logic, Post-Silicon Electrical Validation, Emerging Functional Verification Methods. Bachelor of Engineering (B.E.) in Electrical & Electronics Engineering Sept 2010 – May 2014 Guru Nanak Institutions, JNTU, Hyderabad, India GPA: 3.5 Courses: Microprocessor and Microcontroller, Digital Logic Circuits, Operating Systems, Electronic Devices and Circuits, Digital Signal Processing, Control Systems, Managerial Sciences, Embedded systems. TECHNICAL SKILLS

Programming Languages –C, Python, Java

Hardware Description languages – VHDL, Verilog

Development/ Simulation tools- Cadence Virtuoso, ModelSim, Xilinx Vivado, Mentor Graphics Veloce Testing tools- Selenium Webdriver

ACADEMIC PROJECTS

DESIGN AND SYNTHESIS OF TRIANGULAR SYSTOLIC ARRAY OF SORTER ON NEXYSDDR4 FPGA BOARD Verilog

Implemented a 4 bit minimum maximum sorter module in the triangular architecture in parallel. Implemented synthesizable code to implement it on the diligent Nexys4DDR fpga board and displayed output on the seven segment display.

DESIGN AND SYNTHESIS OF MOTION INDICATOR AND COMPASS MODULE Verilog Implemented RoJoBot module using the Diligent NexysDDR4 FPGA board in Verilog. Designed two newmodules: MOTION INDICATOR: Which indicates the left and right turns of the RoJoBot module with 1X and 2X speeds and displays on the 7-segment LED display of the NexyDDR4 FPGA board inVerilog. COMPASS: Which indicates the amount by which the BOT has taken the left and right turns displayed on the LSB 3 bits of the 7 segment display.

LINE DETECTION ROBOT: Assembly Language, Lua, Matlab Captures the image of the line or white and sent to the wifi module on the bot, using which the bot moves forward. Implemented the line detection alogorithm in matlab. DIGITAL IC DESIGNS: Virtuoso Cadence

Designed and schematics and layouts individually and with fan outs for Inverter, AOI, IOA, Full adder etcetera using the cadence Schematic editor. Performed Design Rule Check on each of them. MODEL CHECKING FOR LOW POWER IC DESIGNS:

Model checking of different sequential circuits using Kripke structure, equivalence model checking using SAT Solver technique.

_SIMULATION OF L3 CACHE:

Simulation of the L3 Cache with design and simulation of the 16 way set associative Cache with write back through LRU replacement policy, implementation of MESIF protocol. ASIC DESIGNING AND MODELING:

Designing and modelling of several combinatorial and sequential circuits with different specifications and Stipulated delays like Mealy machine, Moore machine and relevant examples, implementation of finite state machine with the use of counter.

SMART MEDICAL REFRIGERATOR CLOCK: Verilog

Designed a medical clock which alerts the patients about the time and the prescribed medicine at the given time (input). The timings and medicine are displayed in the 16*2 LCD and a buzzer gives out alarm at that particular time which is given by RTC (DS 1307). The heart of the project is the micro-processor AT89S CO-CIRRICULAR:

INTERNATIONAL STUDENT MENTOR 2015-2016

Worked as an International Student mentor connecting and guiding incoming international students, helping them out with various situations.

OUTREACH VOLUNTEER, Art of Living 2012 - present

Working as an active volunteer for a personality development workshop on behalf of the Art of Living, connecting to different sets of people at university level and spreading awareness about the program.