*** ******* **

Allen, TX ***** Mobile: 214-***-****

Email: acwlum@r.postjobfree.com

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Experienced Program Manager, Recruiter and Team Builder

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Selected Accomplishments:

. Started two high-tech companies in the Dallas area with total revenue

over $1M (Revere Security, Secure Semiconductor Solutions LLC)

. Led multi-company project to create prototype for Brazil SINIAV toll

tag project in just 10 months (Revere Security)

. Technical presentation won first $1M+ customer (Revere Security)

. Built DSP Business Unit with annual revenue over $10M in just three years

(LSI)

Skills

. Outstanding track record of starting new technologies, building high

performing teams and delivering working products that are on-target, on-

time, and within budget

. Experienced with JobAdder staffing platform and Salesforce CRM platform

. Strong Customer/Vendor relations skills

. Experience with managing multi-site projects up to 40+ hardware and

software engineers

. Experienced Agile Project Management

. Strong hands-on knowledge of the hardware and software development

process

. Sourcing of top tier candidates by utilizing various sourcing methods

(i.e. employee referrals, online searches, postings, job/career fairs,

local universities, technical/vocational schools, networking)

Professional Experience:

Hewlett-Packard Enterprise, Plano TX (November 2015 - Present)

Senior Program Manager

Own the hardware side of "The Machine" program

. Manage execution phase of hardware development

. Own Program schedule and deliverables

. Recruiting and staffing engineering team

. University career visits

. Work with internal and external partners

. Manage procurement and cost

. Agile Project Management using Rally Software

Secure Semiconductor Solutions LLC, Dallas TX (January 2014 - November

2015)

Owner/CTO

S3 is a unique ASIC company targeting security IP and design services

. Started company

. Filed DARPA proposal and received first level funding

. Built team with diverse specialized skills encompassing three

geographical location

. Managed project and had working prototype within six months

. Managed Planning and Execution processes of company

. Engaged with potential customers including Texas Instruments and Apple

Apache Design Solutions, Dallas TX (January 2012 - January 2014)

Sr. Applications Engineer / Technical Account Manager

. Managed technical customer relations for thirteen companies in the

Central US region

. Manage customer support requests, escalating when needed. Working with

customer sites and R&D to drive solution to critical issues.

. Developed new design flows and methodologies for power analysis,

helping my customers reach their design targets and schedules.

. Supporting Power Artist: an RTL based power analysis and optimization

tool, and RedHawk: a static/dynamic power and EM analysis tool.

. Analyzed complex power distribution networks on CPU, GPU chips from TI,

Samsung, Maxim and others.

Revere Security Corp., Addison TX (August 2009 - January 2012)

VP of Engineering

Revere Security was an IP provider with a unique encryption algorithm

focused on extreme low power devices for the internet-of-things

. Built and managed a team that delivered hardware (FPGA) product demo

within four months.

. Turned CTO vision into actionable plans and executed on those plans.

. Development and licensing of Hardware and Software Intellectual

Property (IP) and systems solutions for securing the wireless devices

for Smart Grid, RFID, Automotive, Medical and Defense/Aerospace

markets.

. Built and managed research relationship with Southern Methodist

University HACNET (High Assurance Computing and Networking Lab)

. University recruiting at University of Texas at Dallas, University of

Texas at Arlington and Southern Methodist University

Hewlett-Packard Corp., Richardson TX (April 2002 - August 2009)

CAD Manager, Systems VLSI Lab

. Manager, Tools & Methodologies Dept. Managing the development of back-

end ASIC design processes and methodologies (automated flow capable of

building hierarchical chips over 10M placed objects).

. Emphasis on low-Power design in 45nm and below process.

. Design infrastructure and tool development.

. Design Process Improvement

LSI Logic Corp., Plano TX (April 1998 - April 2002)

Design Center Manager for the Advanced DSP Design Center.

. Build team from scratch to 40+ engineers, IT and admin staff

. Technical and personnel leader of a group of 40+ hardware and software

Engineers responsible for the development of the ZSP DSP product line

of ASSPs and IP cores.

. Responsibilities encompassed the architecting and managing of the

entire DSP solution including hardware, software, tools and development

platforms.

. In two years my team and I developed three DSP IP cores and three

ASSPs.

. Licensed ZSP cores to IBM Microelectronics and other IP providers.

. Grew BU annual revenue from zero to $10M

Cyrix Corp., Richardson TX (December 1996 - April 1998)

Sr. VLSI Design Engineer

. Technical lead responsible for the architecture and design of a high

performance floating-point unit for a x86 microprocessor.

IBM Corp., Austin TX (October 1987 - December 1996)

Advisory Engineer / Manager

. Technical member and manager of POWER and PowerPC processor development

teams.

. Design lead of POWER-2 Floating-point unit design team.

. As Manager I recruited from major Universities

Education:

University of South Florida, Tampa FL

BS Electrical Engineering 1986

Member Tau Beta Pi Honor Society

Patents:

. "Mechanism for supporting self-modifying code in a Harvard architecture

digital signal processor and method of operation thereof" (Patent

#6,871,247)

. "Dynamic expansion of execution pipeline stages" (Patent #6,079,002)

. "Instruction dispatch unit and method for dynamically classifying and

issuing instructions to execution units with non-uniform forwarding"

(Patent #5,864,341)

. "Synchronization for out of order floating point data loads" (Patent

#5,506,957)

. "Data processing system with multiple execution units capable of

executing instructions out of sequence" (Patent #5,363,495)

. "Data processing system with instruction queue having tags indicating

outstanding data status" (Patent #5,150,470)

Four security related patents pending

Many publications.

Contact this candidate