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manager

Location:
Singapore
Posted:
October 18, 2016

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Resume:

Surendra Batukdeo

acw4lo@r.postjobfree.com / ********

Profile Results-driven professional with 17 years of experience in Research & Development and Manufacturing Operations for semiconductor and electronics industry in Asia and Americas.

- Design for Excellence (DFx) : Design, Test, Process and Manufacturing.

- Closed Loop Customer Relationship Management (CRM) experience.

- Continual Improvements in Business Processes addressing KPA/KPI. Academic Background

Bachelors of Science Electrical Engineering (BSEE) Wichita State University, Kansas 1997 Masters of Science in Electrical Engineering (MSEE) California State University, Northridge 1999 Certifications Project Management Professional (PMP), Lean and Six Sigma (black belt), 7 Habits of Highly Effective People, Customer Relationship Management (CRM), CCNA, ITIL (on-going), Industry Experience

Senior EDA Engineer (contract) Global Foundries. Singapore. July 2016 - Nov 2016

- Developing automated regression UAT using Mentor Graphics Calibre and GFS Validator in Perl and Tcl/Tk. Senior Test Development Engineer UTAC(R&D). Singapore. Aug 2015 - Mar 2016

- Developed test program for Perigrene 40 GHz RF SOI IC SPDT switch using Cobham PXI and Labview.

- Characterization of delay fault model ATPG for Sequan LTE device using VBT, Shmoo plots and Perl.

- Developed basic test (open, short, leakage) for RDA RF power amplifier using Catalyst/Credence in C++. Reason for Leaving : Restructure. Avago-Broadcom relocated to Penang, Malaysia. Senior Product Test Engineer StatsChipppac. Singapore. Feb 2015 - Jul 2015

- Correlation of Qualcomm and Global Foundries devices using Teradyne Flex and VBT at Final test and Wafer Sort.

- Characterization of Qualcomm’s (PMIC) for Mean, Deviation and CpK using JMP and R programming STDF data. Reason for Leaving : Opportunity to pursue an R&D role with Labview as key requirement. Senior Production Test Engineer Rohde and Schwarz. Singapore. Apr 2014 - Dec 2014

- Improve the debug capabilities, calibration, for radio monitoring and broadcasting devices in LabWindows CVI. Reason for Leaving : Job mismatch.

Senior Test Development Engineer Celestica (R&D). Malaysia. June 2011 - Feb 2014

- Write benefit cost analysis (BCA) and return of investment (ROI) driven SoW addressing Scope, Cost and Time.

- Developed fail-safe, robust, manual and automated systems : Hardware : Programmable jig, fixtures, racks, systems, interface cards etc. Software : NI Test Stand, Labview, Agilent TE-VEE, MS C/C++, C# and VB. Customer : Product - Project Deliverables.

LoJack : EarlyWarning and Vehicle Recovery System (VLU7-172MHz)

- Data mining using XML-SQL to analyze SPC( Mean, Deviation, CpK) to implement DMAIC.

- Characterization for Contact and Wireless (OTA) parameters Rx Sensitivity, RSSI, Tones etc.

- Integrate MBS/Shield Box/Agilent T&M/JTAG Controller/34970A/PXI using Test Stand.

- Developed test program for NPI (ITU7 and VIM) using TI MSP430 and LabView/34970 DAQ. Sonosite : Ultrasound Imaging (TURBO and M2).

- Developed test program for AC/DC power modules cards using Labview/DAQ and E3640A. Agilent : 34401 DMM and 6440x DC Power Supply.

- Conducted DoE to evaluate S.U.T. characterization at Box-Build using Agilent TE/.NET level. Hewlett Packard : Wide Format Printer.

- Develop test cases for AC/DC, USB, RS232, RJ45,DDR, HDD, LVDS in Linux shell scripts. Iridium : Satellite phone (GPS-95xx model).

- Implemented Boundary scan using Visual Basic/JTAG to characterize IC packaging failures. Achievement : NRE from projects : US$550K. Lean and Six Sigma : US$1.6M saving/year. Excellent Customer service award from LoJack and Celectica in 2012 and 2013. Reason for Leaving : Restructure in Celestica, Malaysia. Lecturer Institute of Technical Education, Singapore Aug 2009 - Jul 2011

- Conduct lectures for Electrical and Electronics Engineering, Programming and Mathematics modules.

- Mentor, counsel and guide students and staff in both academia, professional and personal level. Achievements : Developed the OLSO process model using ABB 800xA/AC800M system. Renewed and upgraded 2 MoU (ABB and Omron) for Advanced Center of Technology (CoT). Reason for Leaving : 2 year contract.

Functional Test Engineer Rockwell Automation, Singapore. May 2006 - Sept 2009

- Product transfer from RA Korea to RA Singapore and Contract Manufacturer CM-(Celestica).

- Developed Functional and Performance test characterization for SLC, MLX controllers, DIO and CHMI.

- Developed documentations, trainings and support for Production, SCM, Quality, R&D and CM.

- Developed test software using NI Test Stand-Labview, Agilent TE-VEE, MS C++, C# and VB.

- Power supplies : AC, DC, AC-DC, DC-DC, SPWM, LVDS,

- Communication : RS232/485, RJ45 Ethernet, Modbus, Profibus, CAN, PCI, USB, I2C,

- Features : ADC, DAC, DDR3, Memory, High Speed BUS (I/O), Firmware, Achievement : Pioneer Engineering lead in the setup of Fully Automated Factory for RA in Asia. Improved Contract Manufacturer standards on TQM namely CTQ and OTD. Improved first pass yield from 55% to 98% at RA and CM. Reason for Leaving : Pursue PhD at NTU, Singapore

DFT Consultant PV Technologies. India. June 2002 - Dec 2005

- Improve test access mechanism (TAM) using Test Logic, Test Wrappers, Boundary Scan and BIST.

- Achieved100% test coverage, fault coverage and ATPG Effectiveness using structured techniques.

- ATE test program co-development, integration and debug at Wafer Sort and Final Test level.

- First article (NPI) silicon bring up (verification and validation) at Micron and Global Foundries. Achievement : An opportunity to enjoy and contribute as a subject matter expert. Reason for Leaving : The company was acquired by Mindtree. Regional Applications Consultant Mentor Graphics. Singapore. Dec 1999 - May 2002

- Conduct seminar, workshop and training using Renior, Modelsim and Leonardo Spectrum for ASICs and FPGAs.

- Test architect in DFT Advisor, Fastscan, Flextest, BSDArchitect, Memory, Logic BIST and TestKompress.

- Provide consultancy services to design houses in design, test and manufacturing issues.

- Benchmark against Synopsys, Cadence, Xilinx and Altera for performance (area and speed). Achievement : Excellent Service and Performance Award in 2001 and 2002. Reason for Leaving : IC Design houses relocated to China and India. Test Specialist Schlumberger (ATE). Simi Valley,CA, US. Jun 1997 - Dec 1999

- System integration and debug, software and hardware, for ITS 9000IX and bench testers (PECs) in CVI.

- Support manufacturing plants in Puebla Mexico with debug procedures and guidelines. Reason for Leaving : Graduated from California State University, Northridge. Intern AT&T (Bell Labs). Wichita KS, US. June 1994- July 1996

- Developed SQL scripts for parsing data from MS Access to Oracle database. Skills Summary

Software : C, C++, Visual Basic, Phython, Perl, Tclk/Tk, Java, SQL, NI Labview/Test Stand,VEE,Verilog, Lean : Mean, Deviation, CpK/PpK, SPC, GR&R, FMEA, DoE, 8D, DMAIC, Risk Management, Hardware : Programmable Power Supply, Scope, DMM, Relay, Spectrum and Network Analyzer, Protocol : RS 232/485, RJ45, UART, SPI, TCP/IP, Modbus, Profibus, Databases : Minitab, JMP, Access, Oracle, DB2, R programming, Automation : Rockwell (MLX- PLC, SLC 5/500, Factory Talk), Omron CJM, ABB 800xA/800CM, ATE : ITS9000IX, Teradyne I/U Flex, Catalyst, ETS, Bench Testers, Office : Certified in Advanced Microsoft Excel, Word, Power Point, Access by COMAT, Thesis : DFT for RISC machines using VHDL.

Research : 5 IEEE publications and 2 DoD research grants.



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