DHIVYA.T
No.**, Paygopuram *th street, *******************@*****.***
Thirvannamalai - 606601 +91-890*******
EDUCATION:
Anna University, SKP Institute of Technology, Chennai 2012– 2016
B.E in Electronics and Communication – CGPA:8.18 Sri VDS JAIN Hr. Sec. School, Tiruvannamalai March 2012
HSC exam – Overall Percentage – 86.5%
Sri VDS JAIN Hr. Sec. School, Tiruvannamalai March 2010
SSLC – Overall Percentage – 94.9%
PROJECT DETAILS:
MINI PROJECT: Software and hardware implementation of Pseudo Random Sequence Generator which is a binary sequence that, while generated with a deterministic algorithm, is difficult to predict and exhibits statistical behaviour similar to a truly-random sequence.
FINAL YEAR PROJECT: FPGA implementation of ADVANCED ENCRYPTION STANDARD with optimized mix column technique to reduce the number of logic gates and for improving the architecture. The enhanced Mix-Column transformation with S-Box is to reduce the latency, area and power consumption and also reducing the hardware complexity of AES.
AREAS OF INTEREST:
Digital electronics.
Cryptography.
SOFTWARE SKILLS:
C, C++.
Java(Beginner).
CO-CURRICULAR ACTIVITIES
Completed an In plant training at Doordarshan Kendra, Chennai.
Participated a workshop in BSNL at Maraimalai Nagar.
Winner Of 3
rd
prize in Science of living competition during my school days.
Recipient of first prize award in speech competitions during school days. PERSONAL DETAILS :
Date of Birth : 30-11-1994
Sex : FEMALE
Nationality : Indian
Languages known : English, Tamil (to speak, write) I hereby declare that the details furnished by are true and correct to the best of my knowledge.
Place:
Date:
T.Dhivya