Engineer Design

DAN N. BENNETT ***** Forest Park Drive East, Novi, MI 248-***-****

********@*****.***

OBJECTIVE

- An experienced electrical engineering position that utilizes my analytic applications and circuit design skills

in analog and digital circuits.

- Application of my technical expertise from semiconductor companies on a broad range of OEM silicon

electronic devices.

- Use of my troubleshooting and testing techniques on semiconductor circuitry for small signal, power analog

and mixed signal / digital devices.

SUMMARY OF QUALIFICATIONS

Degreed senior electronics engineer experienced in various semiconductor processes and their circuit designs for analog and digital devices to GHz frequencies.

Circuit designs using 8,16, 32 bit uP / uC, ARM processors. Various software diagnostics to resolve errors / dtc’s / define problem cause. Circuit designs for J1850/1939 and CAN multiplex bus I/F’s.

Application / design engineering power AC/DC conversion systems for hybrid vehicle applications using MOSFET or IGBT power discretes in 3 or 4 phase SMPS designs using various Semiconductor control IC’s.

Resident EE for module / radio launches at Ford and Chrysler plants in meetings to provide support of suppliers’ radios and module circuit designs and EMC issues.

Hands on experience in circuit design for schematics and PCB layout. Detailed design evaluation of passives / active devices via test performance analysis. Testing to the system / component and sometimes die level.

Proficient in MS Windows XP, MS Office 2007 - Word, Excel, Visio, various web browsers, Lotus Notes (at Chrysler-DCX), Mozilla Firefox and Thunderbird, OrCAD, Eagle, eProduct Designer Mentor Graphics.

Rigorous experience with analog and digital devices and their designs using bench test instruments to GHz frequencies and high-speed digital data rates. Testing of device application performance for most active devices that will help others understand the capability of the discrete / analog or digital IC.

Years of design / application and component experience with many silicon processes while employed at: Motorola Semiconductor SPS – Phoenix. Az., National Semiconductor Corp.-Tempe, Az, ST Micro Electronics, Arizona and Michigan, Harris Semiconductor - Southfield, MI and Texas Instruments Novi, MI.

EDUCATION

University of Michigan, BSE-Electrical Engineering, July 1979, Major in Analog / Digital Circuit Design, Various Semiconductors Die Processes Mfg., Minor in Mathematics & Physics.

PROFESSIONAL EXPERIENCE - SHORT TERM - 2/04 – Present

Pacific Insight, DornerWorks, Movimento / AVL / GM Warren VEC 10/08 - Presently

PIEC - Altium schematic capture and PCB layout, assigned to design LIN controller RGB LED

Automotive lighting PCB’s (10 x 20mm) circuit designs with OnSemi NCV7430 RGB LED’s

controller, update engineering lab to proper MM/HBM ESD capability. EMC circuit changes

to pass CI, CE, RI, RE etc. measured at TUV – Plymouth, MI

Dorner Works - Analysis of fluid pump 6-pole driven electronics / pump using LIN / PWM

Controlled RPM for Chrysler, Ford, and GM 2014 vehicles. DFMEA analysis for C & S

AVL Circuit design to develop / testing the Analog and Digital CPU circuits and peripheral components and subsystems for new and existing laboratory testing products for diesel engine

Combustion .

GM Warren - Analysis / changes of GM’s latest IP / Cluster problems, wire harness design and applications to needed module interface for new “Volt vehicle technology.

Sr. Component applications engineer for numerous semiconductor Company’s / devices for analog and digital circuits (sometimes to the semiconductor die level) for new / existing designs. Trouble shooting of the failing, module, assembly, design, of all components to resolve problems.

Semiconductor Application engineering, problem solving with semiconductor suppliers.

General Dynamics Land Systems Sterling Heights, MI 6/07 – 9/08

Sr. Electronics Design Engineer

Circuit design and then develop and test the analog and processor circuits peripheral components and subsystems.

Designed and defined the Video Data Recorder (VDR) h.264 process that utilizes the TI Advance TMS320DM6467 and five other complex IC’s for this 1920 x 1200 16:10 video compression processing or, visual matrix video for defense vehicles. Twelve IC’s were incorporated into my final design.

Analyze new hardware designs (analog / digital) recently introduced, developed engineering design fixes and coordinated those solutions. These new designs replaced / improved obsolete engineering designs. Participated and sometimes lead Program Management meetings for these designs.

Tested new designs in the development lab with complex test instruments for the latest silicon design device behavior and there datasheets from semiconductor manufactures.

DaimlerChrysler, DCX Auburn Hills, MI 4/06 - 5/07

Resident Releasing Engineer – RM Core Radio

Chrysler - Releasing Engineer – RM Core Radio (New radios for the RM 2009 V W minivan to be built for Volkswagen. The display redesign, implementing a new display assembly.

Daily activities in the CN’s system for design changes of the RES / REQ / REN and RER radios.

EMC and RF field testing of the Harmanbecker “fixed” circuit designs of their NTG4 Radios in vehicles at the component and vehicle level. Implemented HW / SW redesigns to pass standard DCX EMC limits. ( See my Harris Semiconductor experience on page 4 )

Ford Motor Company Dearborn, MI 1/05 – 2/06

Resident Sr. Design Engineer–Core Radio Audio Head Unit.

Assigned to DV/PV for the 2008 ACM center stack radio. Tech Specialist for circuits of all products, especially body controllers, and instrument clusters for the next year vehicles designs.

Activities: New design TDR’s (technical design reviews) program management for specification validation, much of my time is spent reviewing circuitry proposed by Visteon, SANYO, Delphi. Circuitry ranges from the basic circuit design for analog (Audio, RF and DC) also DSP operation-function designs for all operational issues. My favorite time in this position is lab work for extensive circuit checks, problem resolution and solution testing.

Updating / flashing EEPROM software onto head units / modules, interacting with automotive OEM assembly plants.

Continental TEVES Auburn Hills, MI 11/03 - 12/04

Sr. Design / Component Engineer

Silicon wafer level analysis of digital IC and analog components / poor designs that could contribute to the malfunctioning behavior of the silicon die / dice vertical / horizontal structure in wafer processing.

Solutions to these problems using lab instruments that include the Tek576 curve tracer, Fluke PM6306 Prog. LCR bridge, Kepco Bipolar Operational power supply / amp, Lecroy Wavepro950 O-scope, Tek TDS3032B 300MHz O-scope and two HP Spectrum Analyzers. Silicon wafer level dice investigations are accomplished using these instruments. A circuit design change was the usual fix.

Performed diagnostics to find the parametric that is being violated in the VLSI IC’s In-depth knowledge of circuit design and “anomalous” operation of integrated circuits. Detection at the wafer level for processing defects, ESD and EOS usage / assembly damage.

DIRECT ENGINEERING POSITIONS ( PREFFERD )

Harman/Becker Automotive Systems Farmington Hills, MI 7/01 - 10/03

Sr. Design / Component Engineer

Silicon wafer level analysis of digital IC and analog components designs that could contribute to the malfunctioning behavior of the design. Applicable designs include the Mark Levinson ML1/C and ML3, Daimler Chrysler CS02, DR, AN84, KJ platforms, five amplifier designs for Toyota/Lexus and various other OEM’s.

Solutions to these problems were accomplished using lab instruments. Silicon wafer level dice investigations are accomplished using these instruments.

Audio sweep testing was accomplished using the Audio Precision System 1, with the APwin Ver.2.22 software. Check of s-record assignments in C++ SW. In-depth knowledge of the circuit design and “anomalous” operation of the integrated circuits is crucial in these investigations. Detection at the wafer level for oxide defects, ESD and EOS usage / assembly damage.

Supplier communication to understand the unique possibilities that there IC maybe sensitivity to a unique set of connections and voltage conditions. Resolution of problems with CS02 and its load-dump capability, ML1 AVC-LAN diode protection leakage current issues and oscillating power monolithic amp IC’s are a few examples of these supplier quality problems.

Peer engineering reviews with designers on all designs going to DV and PV and associated

changes for the first control run. Reference the failed parameter and search supplier provided SPC

data for that parameter.

Avail Networks, Inc Ann Arbor, MI 8/00 - 6/01

Senior Hardware Design Engineer

Analog and Digital circuit design of high bandwidth ISP type data concentrators (DSLAM). Engineering responsibilities include all schematic capture, net listing and simulation to a working prototype. This effort required a good working knowledge ePD View Draw, for schematic capture and simulation, to generate the needed printed circuit board. This process set device placement and net layout of this 1800 component design. Prototype responsibility includes the required debugging and testing to a specific application performance level. This product also required working experience in the design of EPLD's using Altera /other design environments.

In the few months in this position I have designed, built and am currently testing this daughter card that has : 12 -ports SDSL, 4 -ports T1/E1 and an OC-3 fiber optic port. This design is the first of its kind for this company. It will provide communication data rates up to 155Mbps.

Texas Instruments, Inc. Novi, MI 11/97 - 7/00

Sr. Analog Field Applications Engineer

Application engineering, primarily with all TI analog products. The following engineering responsibilities include:

Analog design-ins - Design activity includes suggesting the appropriate AAP/MSDS IC and its circuitry connections to customers for their specific requirements. A typical design scenario would be the selection of signal processing devices to optimally fit their requirements, as well as the small signal path IC's to the DSP, and analog and digital data converters required for the system. Evaluation of analog input and output voltage requirements of the developed IC needed to provide the customers solution. Reference the failed parameter and search supplier provided SPC data for that parameter. Examine at dice level for silicon anomalies.

New Product definitions - Establishing and formalizing the description for a new IC solution that are compatible in the mass market and automotive applications. Support and drive the development of the device through the TI product group.

Application notes - Writing application notes on IC's that will help others understand the capability of the IC. Wafer level or dice level explanations for the all devices to explain what behavior to look for.

Automotive responsibility - Analog designs applied to application unique automotive circuits. The design of TI analog products into low voltage applications at OEM's and suppliers automotive market.

Harris Semiconductors Southfield, MI 2/92 - 11/97

Sr. Field Applications Engineer

Trained in all applicable silicon (vertical and horizontal) processes PMOS (MOSFET and IGBT), Intelligent power 3, 7. 10 um geometry's. Device behavior at the pin and device die level and assembly methods.

Design activity includes custom IP IC’s developed for ECM’s including FCC, SBECIIA, SBEC3, 3+, 3A and a major emphasis on the PCM (Powertrain Control Module).

BODY/CHASSIS - IP IC’s used as low side drivers to control IP and body controller functions for Chrysler’s SCP, LCP, Minivan and Jeep/Truck platform.

AUTOMOTIVE MULTIPLEXING - Analog design/application engineering of the unique J1850 physical layer XCVR circuit, HIP7020. This crucial design has eight patents registered because of its unique robust design. Detection at the wafer level for oxide defects, ESD (HBM or CBM) and EOS usage / assembly damage.

Support/system engineering of the HIP7010 JBLIC and the HIP7030/7038A8 C utilized as the digital handshake portion of a "typical" two chip J1850 solution for DCX . Reference the failed parameter and search supplier provided SPC data for that parameter. SEM analysis for silicon level inexplicable behavior faults.

SGS-Thomson Microelectronics Phoenix, Arizona 3/89 - 1/92

SGS-Thomson Microelectronics (Livonia, MI)

Sr. Technical Field Applications Engineer for All Products, North America

Position responsibilities included the applications of SRAM, cache tag, FIFO, zeropower / timekeeper and nonvolatile ROM in a wide range of computer and system designs. Crucial responsibilities require an in-depth knowledge of the application/ function of unique customer circuit requirements. Areas of work in design-in efforts include Power MOS, IGBT, Bipolar and all standard linear circuits. Thorough understanding of customer circuit design using linear IC and discrete component networks was mandatory.

Silicon wafer level analysis of digital IC and analog components for design faults that could contribute to the malfunctioning behavior of the design. Customer FAR leakage measurements for handling issues caused by ESD, EOS leakage currents.

National Semiconductor Corporation, Tempe, AZ 3/86 - 3/89

Sr. Field Applications Engineer, Analog Field Product Specialist

Worked with Bob Pease, Bob Widler and Thomas Fredericson authors to the analog beginnings of IC's. Application and design engineering of circuits for all RF, Analog products, especially CODEC products.

Trained in all applicable silicon (vertical and horizontal) processes PMOS (MOSFET and IGBT), Intelligent power 6, 8. 15um geometry's. Device behavior at the pin and dice (wafer) level and assembly methods.

ASIC design with Pspice, FUTURENET ASIC design and simulation interface to Santa Clara design Team.

Determine the failed parameter and SPC data for that parameters typicals. SEM analysis for silicon level inexplicable behavior faults. Examine at dice level for silicon anomalies.

Responsible for application consultation with southern California, Arizona & New Mexico OEM's. Extensive travel throughout the southwest region. Customers included Hughes Aircraft, IBM, Honeywell (three locations), AT&T, Motorola, Loral, and major distributor accounts

International Anasazi, Inc. (VISA, USA) (Phoenix, AZ) 11/83 - 1/86

Design & Development Staff Engineer

Designed digital and RF analog circuit into modules and interfaced them to form a two-way RF cable entertainment system. Development of C code and various algorithms for Silo Z80B processor.

Supervised technicians and draftsmen to design a 160kbps high-speed full-duplex CATV system. Performed all the radio frequency, digital and power supply design for both head-end and remote station electronics.

Pilots of the finished project were installed at Walt Disney World hotel, and the QE-2 ocean liner.

Motorola Semiconductor Product Sector (Phoenix, AZ) 10/79 - 11/83

Application & Product Development Semiconductor Division

Product Engineer, Application & Product Development - HiFOP Semiconductor Division

Eleven characterizations (data sheets) of Radio Frequency Transistors: MRF901/A,

MRF902, MRF971, MRF972, MRF981, MRF982, BFR90, BFW92A, MRF962, MRF239

and MRF559. Published data sheets intended for the "Motorola RF Designers Discrete

Handbook (databook)", published in 1983 by Motorola Semiconductor Product Sector,

5005 E. McDowell Road, Phoenix, Arizona.

Responsible for product development and application of radio frequency discrete power

semiconductors and design of matched power transistors for radio frequency applications.

Supported Motorola communication sector with special class AB and C transistor designs.

I Designed application microstrip circuits using CAD/CAE tools to optimize gain or low noise

exhibited in newly designed R.F. transistors’ performance.

Successfully designed: Class-A, Class-C, and pulsed microwave power amplifier designs.

TRAINING:

Motorola SPS Inc., AZ University (in plant): Semiconductor Fab Courses, Ion Implant, Wafer processing courses.

National Semiconductor Corporation Santa Clara, CA: Linear/Mixed, ASIC & COP4/800 designs training.

SGS-Thomson AZ, Italy and France: BCD60 /100 Mixed signal IC process applications, Flash EEPROM applications, discrete MOSFET’s and bipolar transistors training.

Harris Semiconductor, MI and Somerville, NJ: Intelligent power IC custom designs, MOSFET applications and trench / hex MOS process technology training.

Texas Instruments, Dallas, TX: Wafer test at probe for processing in large volume automated fabrication lines for defects at device die and wafer level.

AWARDS

Motorola SPS Silver Quill Award, Harris Semiconductor Golden Quill Award, SAE Industrial Lectureship Honorarium.

PUBLICATIONS

- "R.F. Design" magazine, cover article on " RF Plastic Power - A new standard for the industry " on the MRF559, a 900MHz cell Phone Class-AB driver stage RF amplifier.

- Motorola Semiconductor Product Sector, EB-109 “Low cost UHF device gives broadband performance at 3.0 watts output”, using the MRF630 a common emitter TO-39 metal can package. Published in 1984 AND "Electronics Magazine" Designer's Casebook, "Exploiting the full potential of an RF power Transistor" Page 118, Published June 30, 1982

- SAE Technical Publications (still available from SAE publications), While with Harris Semiconductor working with Chrysler on J1850 for MY' 98 OBDII vehicles. In SAE book SP1070 #950036 “Network I/O and System Considerations" for J1850 Multiplexing and the SAE white paper HIP9010 “Analog Signal Processing Increases Engine Performance” engine knock processing.

- Texas Instrument - Designer Note Pages (can be found on the internet) : Written for TI "Off-Line SMPS Failure Modes PWM Switchers and DC-DC Converters" Pub. SLVA085, and "Using the TPS767D325 LDO Regulator" ( for fast transient current response ) Pub. SLVA089 .

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