Design Engineer

M.FAISAL SHAKIR

Email: acv4bg@r.postjobfree.com; Cell :480-***-****

San Jose, CA.

SUMMARY: EE with over 15 years’ experience of High Speed/High Frequency Mixed signal

Rigid/Flex HDI PCB Designs for Wearable, RF/Microwave, Commercial, Evaluation & ATE Applications. My expertise includes all phases of design from via /pads creation to final DFM/DFA output & FAB & Assembly Vendor support.

OBJECTIVE: Accept Challenges & Accomplish Successfully with help of my innovation skills and qualification.

SKILLS:

EDA/CAD: Allegro 16.6, OrCAD Capture CIS, Concept HDL, Altium Designer 15.1, PCAD 2002, (ACCEL EDA), SPECCTRA (CADENCE), PADS9.0, AutoCAD 2000, Solid works, Teradyne IGE & EM test express.

SOFTWARES: MS Office, Lotus Notes

EXPERIENCE:

Sr. Rigid/flex PCB Design Engineer (March 2016-To date)

Apple Inc. Cupertino. CA

Job Responsibilities:

HDI flex & rigid PCB designing for high volume Apple Products (Keyboards, Charging Modules, IO Modules)

Comprehensive DRC by tools like “Caliber”, “Valor” & “Ruler” for error free product release.

DFM & DFA functions support.

Multiple design handling & Schedule management.

Electro Mechanical Design integration by using IDX & IDF files.

Using Perforce for design files managements, X functional review & Ok to FAB release.

Component Library management using Agile & PDM.

Cross functional team support for various product design group.

Application Engineer :( July 2015 – March 2016)

Teradyne Inc. San Jose, CA

Job Responsibilities:

Designing High Density / High layer Count /High Frequency PCB for ATE & Consumer Application.

(0.4 MM Pitch with Blind & Buried Via)

Managing Multiple Design simultaneously with help of Offshore Design Team.

Supporting FAB/ASSEMBLY Vendor Operations.

Parts selection, procuring Parts and Managing Library.

Conducting Design Kickoff & final review meetings.

Sr. Rigid/Flex HDI PCB Layout Designer III :( AUG 2010 – June 2015)

Freescale Semiconductor, Phoenix, AZ (www.freescale.com)

Job Responsibilities:

Designing Final Test/Probe / Engineering / HDI PCB based on Electrical/Mechanical Inputs from Internal & External Engineering customer for Automotive/Sensors & RF applications on ATE platforms like Teradyne /Multitest / Advantest & Agilent. Also Design HDI Flex / Rigid PCB’s for Wearable Consumer Electronics and for Evaluation /FA & Characterization boards.

Achievement includes:

Introducing & implementing Hybrid Layout design technique (Reduces 50% design cycle time & 75% Design Cost).

Managing & Establishing Offshore Design Team.

Introducing & implementing Hardware Request Form (HRF) systems.

Creation of Global archiving location for all Designs.

Implementing MSA for FAB & Design Vendors.

Quality log creation for Designs, FAB & Assembly Issues.

Interfacing with customers & Engineers for Electrical / Mechanical Inputs.

Creating Parts (symbols & footprints) Capturing Schematic, Placement & routing Study, setting constraint for routing, impedance matching, cross talk & delays, final design cleanup & final DRC reports to release error free design.

Releasing of final manufacturing data (RS 274X Gerber’s, IPC NET LIST, ODB++, BOM & PNP Files)

Managing PCB design Projects for US and Overseas design facilities.

Maintaining design documentation through Agile PDM system.

PCB Layout Designer: Panacis Inc. Ottawa / Scintrex Inc Concord :( Oct 2009 –Aug 2010)

Job Responsibilities:

Design and drafting High power and battery charging PCB using Protel SE99 and PADS 9.0 for Medical Equipment & artificial Human Organs. Creating Electrical /Mechanical Interfacing. Converting Protel SE99 library into PADS 9.0.

Creating Project work analysis based on customer requirement. Creating constraint file.

Project costing based on materials and expertise requirement. PCB penalization by using CAM350 & Camtastic 2000.Generating Final Manufacturing documentation.

Contract PCB Designer: SaiBas Technologies Inc/Advanced IO BC) (Feb 2009 – OCT 2009

Job Responsibilities:

Designing of High performance/High frequency 10 Gigabit Ethernet rugged interface cards for mission critical applications like Radar/ Cyber Security & Signal Intelligence. (Please see V5031 & V1121 products design at http://www.advancedio.com/products/form-factor/pci-express/)

Designing PCB with Multiple I/O interfaces like RS232, RJ45, USB, DB25, HDMI & PCI express.

Generating reports like DRC, ERC, net length, capacitance & pick & place locations.

Providing on site layout support and trouble-shooting. Generating DFM/DFA DATA.

PCB Designer : Ensil International, (www.ensil.ca) (Jan 2007 – Oct 2008)

Job Responsibilities:

Working as a Lead design engineer for highly complex /Target oriented Military PCB (Flex & Rigid) Applications. Redesign Boards by Reverse Engineering. Finding obsolete or alternative components, Project costing, ohm out Gerber’s, creating mechanicals. Creating & managing Components library. Schematic capture based on hand drawn Sketches, defining layers stack up, and defining form factor. Placement & routing Study, Gerber’s setup & final design release. This also includes Environmental & EMC testing for MIL Projects

Testing & SMT support Production Associate (April 2006 to Dec 2006)

Celestica International Toronto, Canada.

Job Responsibilities: ICT & Functional Test support for customer’s like IBM, Intel, Juniper, & Cisco. Providing Woodpecker testing support for prototypes products by using Takaya 9400 & Takaya 9300 testers. Hands on support on Failure analyses on PCB by using Teradyne IGE (integrated graphic editor) & EM test express. Updating BOM & Assembly DWGS based on ECO’s.

Senior PCB Design Engineer: Altanova Corp (Jan 1999 – May 2005)

Job Responsibilities: Designing of high frequency, multilayer load boards (DUT & Probe cards) with Controlled Impedance & minimum cross talk. Creating footprints for BGA Sockets, Micro BGA Sockets and PLCC Sockets. Placement & routing with Matched length Diff pair’s. Generating final Manufacturing Data. Leading design team & mentoring Junior Designers.

EDUCATION: BS (Electrical Engineering) NED UET Karachi April 1998

TECHNICAL MEMBERSHIPS/CERTIFICATION:

IPC Certified Interconnect Designer (CID-981000058)

Allegro PCB Editor Intermediate Techniques 16.3

Allegro PCB Editor Basic Techniques 16.3

REFERENCES: Will be furnished upon Request

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