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Design Safety

Location:
Bengaluru, KA, 560001, India
Posted:
May 16, 2016

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Resume:

MANJUNATHA NAIK V

Date of Birth: **th MAY **** Mobile: +91 - 889-***-****.

E-mail : acus1p@r.postjobfree.com.

OBJECTIVE:

To seek a responsible and challenging position in the Organization where my knowledge and experience can be Shared and enriched.

EXECUTIVE SUMMARY:

1-Year of Experience in Physical Design at JSSATE, Bengaluru. EDA Tool: CADENCE, NCsim Simulator, SOC encounter. Technology Nodes worked on: GPDK 180nm.

ACADEMIC DETAILS:

M.Tech in VLSI Design and Embedded systems: 74.18%; JSSATE, Bengaluru,2015

B.E in Electronics and Communication Engineering: 60.32%; APSCE (VTU), 2013.

XII: 55%; Rural PU College, Kanakapura, 2009.

X: 65.60%; RMPHS, Kanakapura, 2007.

TECHNICAL SKILLS:

Programming Skills: Verilog HDL, C, JAVA, 8051/8086 Programming.

EDA Tools: Cadence Virtuoso :( Schematic editor, Spectre, Layout L and XL editor, Assura (DRC, LVS), Cadence NCsim, Matlab, Solid Edge, OrCAD: (Capture CIS, P- Spice, PCB editor), ModelSim PE, Kiel μvision, Soc encounter.

IDE known: Eclipse.

Knowledge of Solid State devices and their working.

Experience in Physical design flow such as Floor Planning, Placement and Routing.

Understanding of Fabrication steps.

Knowledge of Fundamentals of CMOS Transistor Theory.

Good understanding of Layout issues such as Antenna effect, Latch-up and Electron Migration.

Knowledge of CMOS Design concepts & methodologies.

Knowledge of Memory design concepts (STA, Setup & Hold time).

Good Knowledge of Digital Logic Design: Combinational Logic Circuits, Sequential Logic Circuits, Memories (SRAM)

Knowledge of Embedded system design

Operating Systems: Windows, Linux.

PROJECTS:

1. Design and Implementation of Hybrid Prefix Adders: Tools Used: Cadence NCsim, NC-Verilog and SOC Encounter. Time Period: 6 Months (DEC 2014 – MAY 2015).

This work is to compare the various Parallel Prefix adders in terms of various Design Parameters.

This includes the design of Radix-2 & Radix-4 implementation of Han-Carlson Adder and comparison with other adder topologies.

This work also includes implementation of Arithmetic & logic unit by using Prefix adders. 2. RedTacton based integrated safety device for cars: Tools Used: Kiel μvision.

Time Period: 4 Months (FEB 2013 – MAY 2013).

This work involves implementation of Encoder & Decoder part of the safety handling device which is used in cars.

This implementation is to set the threshold of Encoder & Decoder device to check the nominal body temperature of authenticating person.

The sense amplifier used as the sensing material. CONFERENCE / PUBLICATION:

Paper Publication on “Performance Analysis of Parallel Prefix Adder” in International Research conference on Electrical Electronics and Data communication (ICEEDC-2015), Bengaluru.

ACTIVITIES / ACHIEVEMENTS:

Participated in Leadership development program which is held on 24th NOV 2007.

Attained NCC ‘A’ certification from ministry of defence, Govt. of Karnataka.

Participated in Movie Making and secured 1st place in the annual cultural events for the year 2011-2012 which is held at APSCE, Bengaluru.

STRENGTHS:

Willingness to learn.

Strong work ethic.

Organizational and planning skills.

Flexibility and adaptability.

PERSONAL DETAILS:

Father’s Name : Venkataswamy Naik

Mother’s Name : Bhagya Bai

Date of Birth : 28th May 1991

Nationality : Indian.

Languages Known : Kannada, Hindi, English, Lambadi and Telugu. Permanent Address : Manjunatha Naik V s/o Venkataswamy Naik

# 23, Saldoddi, Tatguni (PO),

Near Art of living international center,

Bengaluru -560 082.

Hobbies : Reading Books, Listening to Music.

DECLARATION

I hereby declare that all the details furnished above and enclosures are true to the best of my knowledge.

Place: Bengaluru. (Manjunatha Naik V)



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