Computer Science Data

SUMMARY ***, Hiett ave, Email: apt **, muditltr@Arlington, gmail.TX-76010 com LinkedIn Phone: 872-***-**** Computer Science master’s graduate looking for fulltime/internship positions in software engineering, real time embedded systems and Internet of Everything, bringing prior fulltime experience of four years working as a Product Engineer for WYSE Technology (DELL Inc.) and Qualcomm in addition to one year of research experience at University of Texas at Arlington, developing real-time embedded solutions for Texas Department of Transport. EDUCATION

Master of Science in Computer Science-Thesis Expected date: Aug-2016 University of Texas at Arlington Arlington, TX

GPA: 3.5/4.0

Bachelor of Engineering and Technology in Computer Science May-2008 SRMSCET, Uttar Pradesh Technical University Lucknow, U.P., India GPA: 3.7/4.0

TECHNICAL SKILLS

Operating Systems Android, Linux SUSE, UBUNTU, WinCE, MicroC/OS –II Programming Embedded C, C++, Python, Verilog(basic), Matlab(basic), PL/SQL Scripting Shell Script, Perl, Python

Tools MPLAB, Arduino, Altera Quartus II and EDS, Visual Studio, Eclipse, Hadoop, R, JIRA, Jenkins Debugging tools GDB, Dbg view, Wireshark, Trace32 JTAG, Crashscope, Agilent, QPST, Oscilloscope, Logic analyzer Protocols TCP/IP, DHCP, UART, I2C, SPI, RS-232, CAN Hardware Data Translation, Altera FPGA, FPGA-SOC, sensors, Microchip PIC18, ARM cortex A9, Intel Galileo SCM Tools SVN, perforce, GIT, CVS

EXPERIENCE

Graduate Research Assistant

Micro Developed Embedded Texture proof Instrumentations Measurement, of concept for Precision this Lab, Texas-Motion University Department Control of of and Transport Texas Road at Profiling research Arlington project, System devised a system capable Jan of 2016 performing - Present measurements at 0.2 micrometer resolution using laser sensors and measuring features of road texture at highway speed. Tools: Gained C, in-C+depth +, Verilog, Knowledge MicroC/and OS understanding –II, embedded in Linux, designing ARM real-Cortex time A9, embedded NIOS 2, TCP/and IP, FPGA UART, based RS-232, solutions ADC, for DAC, industry JTAG, Arduino use.

• Developed software for real-time data acquisition using 16-bit Data Translation ADC for 6-channel simultaneous sampling on multithread processing.

• Programmed device drivers for communicating, controlling and synchronizing sensors such as lasers, accelerometers and motion controller using embedded boards for e.g. Intel NUC, Galileo and Altera FPGA System-on-chip.

• Internet-of-Things architecture devised over Ethernet enabled peer data communication, real-time digital filtering, executing machine learning and decision making tasks such as online linear regression analysis on texture data.

• Achieved approx. 30% performance improvement against conventional embedded boards by designing a parallel processing system architecture on Altera FPGA using multiple dedicated NIOS processing units, and shared memory based inter-processor communication.

Graduate Embedded Lab Instructor I Teaching (CSE for course 5442)Assistant,, CSE Real-5442 time Embedded University data acquisition I, which of Texas and involved control at mentoring Arlington systems graduate (CSE 5343) students and resolving Aug their 2015 queries – Present on various assignments related to designing real-time and embedded systems.

• Helped students with lab assignments to program LCD, ADC, DAC, UART and SPI drivers for PIC microcontrollers and Intel Galileo board using Arduino IDE.

• Supervised a few new lab assignments for CSE 5343 which involved system development on Cyclone 5 FPGA System-on- Chip using Verilog, Data Translation ADC, Linux OS, NIOS 2 processor, Pthreads and TCP/IP network programming. Mudit Pradhan

Consultant Modem Worked Processor in close Engineer co-Sub ordination System, I, Qualcomm, with Android multiple Hyderabad, sub-system teams India from across the world to fix critical customer May issues 2012 debugging - Aug 2014 modem failure logs and crash reports w.r.t various aspects of wireless communication. Gained expertise in Chipset bring-up, pre-Tools: silicon C, C+validation, +, Python, real-Android, time debugging QXDM log analysis, and executing JTAG debug, critical modem firmware, configuration XML, JSON, Wireshark management tasks.

• Handled modem System Integration activities as a primary point of contact for multiple target chipsets.

• Debugging modem failure logs and crash reports w.r.t various aspects of wireless communications to identify potential modem bugs and root-cause the modem sub-system responsible.

• Developed and optimized test scripts to improve chipset quality, stability while reducing execution time.

• Validating modem functionalities w.r.t. UMTS/CDMA/LTE, Boot ROM, WLAN and GPS. Software WYSE Worked Enhanced on Engineer, development Operating Wyse of above Systems: Technologies real-Linux time operating SUSE, (DELL Ubuntu, systems Inc.WinCE, ), Bangalore, for various Wyse Wyse Thin India OS Thin Client hardware platforms Dec 2009 to enable - Mar Wyse 2012 enhanced virtualization capabilities and support for cloud client computing. Significantly contributed to in-time and successful commercialization Tools: • Developed C, Shell Scripting, OS for features industry’s Curl according library, first Posix ARM to functional thread, based Linux Uboot, specification platform Linux Internals for to Thin support computing. (user/new kernel hardware mode)platforms, IPC, QEMU, and VI fixed editor system bugs.

• Debugging and Root causing critical failures related to hardware, network, virtualization and OS imaging software.

• Initiated full automation for Continuous Integration, OS deployment and imaging for 20 product lines, reducing human intervention by 90%.

• Implemented the OS Configuration requirements and automated test plans. MASTER’S Evaluate Designed the and THESIS use integrated of FPGA-an SOCs innovative for high model speed for data secure acquisition, and accelerated and high computing performance for multi-computing. channel simultaneous ADC sampling and data processing over FPGA system on chip device, evaluated the system performance and accuracy against the conventional resource constrained embedded solutions. PROJECTS

Galileo Process Trend derived A amplitude Embedded Peer Probabilistic Multivariate given data Machine Internet controlled Real-challenge. to geographical Analysis board time by Peer model, of Learning and and hierarchical Testing Things: Embedded Application: and classification Robotics: variable configured Kalman and DE2-region, on Digital Instrumentation: Data 115 Seed clustering frequency filter. Simulation Control through used Mining: A FPGA. signal on Data: distributed Big Yelp.System: processing performed signal Seed a Discovering Data: of Windows com robotic PIC18 structure used file customer Decision Multi-sharing on on for microchip movement server. business UCI sensor threaded testing classification tree review seed application based data instruments. based strategies in data. data data. observable from classifier acquisition Standalone using for various for Windows, K-helping to nearest environment devices predict server system using upcoming neighborhood and forest connected to distributed generate using client cover ventures Markov application over type, a on variable hash cluster TCP/to decision Kaggle.succeed table. IP, using Ids com Intel in a AWARDS

Prism, Award of Excellence Feb 2014

In appreciation of hard work and dedication to ensure in time modem releases for critical customer issues for Qualcomm 8960 target chipset.

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