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Engineering Project

Location:
Dallas, TX
Posted:
April 20, 2016

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Resume:

Anitha Ramesh Puranik

713-***-**** acufsg@r.postjobfree.com

OBJECTIVE

Seeking an entry-level position in the field of Computer Science Engineering

EDUCATION

University of Houston, TX

MS in Computer Engineering (Graduating in May 2016)

CGPA:3.40

PES Institute of Technology, Bangalore, India

Bachelor of Engineering in Electrical and Electronics Engineering (June 2013)

Graduated with a First Class (CGPA:7.07/10)

RELEVENT COURSEWORK

Adv. Computer Architecture

Integrated Circuit Engineering

Adv.topics in Computer Architecture

CMOS Analog Circuits

Advanced Digital Design

Adv.topics in Microelectronics

Fundamentals of Operating Systems

Principles of Internetworking

VLSI Design

Data Structures (Audited)

Cloud Computing

TECHNICAL SKILLS

Programming Languages: Verilog HDL, Python, C, C++, Embedded C, and x86 assembly language

Engineering Tools: ModelsimAltera, QuartusPrime, CadenceVirtuoso, Mathematica, Silvaco, MATLAB, and Microsoft Office

Operating Systems: LINUX, UNIX, and Microsoft Windows

PROJECTS

Analysis of Cache Performance Using Dinero IV Cache Simulator

Mini Project in coursework, Advanced Computer Architecture

oCache system for Alpha 21064 superscalar processor was analyzed for effect of pre-fetching, cache size and its associativity, and block size based on miss rate

o Impact on miss rate with and without automatic pre-fetching, by varying cache size and block size was studied for I-caches and D-caches

MIPS Pipeline Simulator

Final Project in coursework, Advanced Topics in Computer Architecture

oDesigned and implemented RTL for the integer pipeline of a MIPS based architecture, including data and control hazard checking and data forwarding. Design was fully tested and validated

Several Mini Projects in Verilog HDL RTL

Designed and developed various systems using Altera DE2-115 FPGA. Examples: Multi-function system which performed load, shift left and shift right operations (with 8 bit inputs).

Timer system, using finite state machines, which implemented a timer with a maximum value of 99 minutes and 59 seconds and granularity of 1 millisecond

Simulating web servers and clients

Final project in coursework, Cloud Computing

oDeployed a website with database to the cloud (EC2), TPC-W benchmarking tool was used to evaluate the performance of the website under different loads

Simulation of Pre-Emphasis for High Speed Serial Link

Mini Project in coursework, Advanced Topics in Microelectronics

oWorked on MATLAB code to run simulations at different data rates for FR4 backplane channels for a pre-emphasis filter

Final Year B.Eng Project- GSM based Control of Home Appliances For Smart Home

oDeveloped prototype design to save electricity at homes that uses SMS to send and receive commands to and from microcontroller, which controls the specified device or performs the specified task

6th Semester B.Eng Mini-Project: Low Power Indication Alarm System

oDesigned an alarm system to monitor batteries and report failure both visually and audibly via a LED and Buzzer respectively

EXPERIENCE

Graduate Assistant, University of Houston Aug 2015-Present

oSupervise students taking tests

oInspect all computers for quality assurance

oKeep account of daily tests conducted and number of students appearing for the test

Intern, Bharat Earth Movers Limited (BEML) June-Aug2011

oAnalyzed assembly and performed testing of electrical subsystems for the Bangalore Metro Rail project



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