MICHAEL ROMAN

Westminster, CA ***** acu8bz@r.postjobfree.com

Cell: 714-***-****

QUALITY ENGINEER

Experienced Professional with focus in Quality Test Engineering, Quality System (Supply Chain) lean manufacturing, product/process design, and Six Sigma with outstanding Root Cause analysis, problem solving and troubleshooting skills: seeking a challenging position, which these skills can be utilized and enhanced within an organization. In addition, this will allow me to contribute my independent, creative and resourceful thoughts in an enthusiastic team, and actively add value to the growth of the company.

AREAS OF EXPERTISE

Hardware & Software Test

System Performance Testing

Circuit Analysis

Lean Quality Tools

Troubleshooting

Quality Auditing

PROFESSIONAL PROFILE

With over 15 years of strong project management skills and ability to execute well under pressure.

Thrives in independent and in a team dynamic, an aggressive Root Cause Problem solver, and motivational collaborative skills.

Inventive with proactive approaches to all complex problems with effective analytical solution.

Rapidly learns new procedures and process quickly adjusts to changes in products, schedules, environment and organizational objectives.

TECHNOLOGY

Altera/Xilinx VHDL

Microsoft Operating Systems

Microsoft C++

Cadence/Orcad PSpice

Mac OSX

Mathworks Matlab

Unix/Linux/VxWorks

MS Office Products

Script Files

CAREER PATH

Quality Engineer (Contract) Alcon January 2015 to December 2015 Irvine, CA

Conducted bi-weekly Quality Meetings with Production, Test Engineering, and Mechanical Engineering.

Complete Complaint Investigations by analyzing returned systems and analyzing quality performance data/trends to identify the root cause of problems and drive corrective action.

Root cause analysis and implementation of corrective action for process related concerns for Printed Circuit Board (PCB) assembly process for SMT, AOI, and SPI.

Reduced MRB (scrap) inventory from 45k to 15k within 3 months (April, May, and June).

Provided technical guidance to Quality Technicians and Inspectors.

Developed and reviewed various protocols for Process Qualification, Design Verifications and Validations, Installation Qualifications, Operational Qualifications, and master validation plans and executed CAPA investigation.

Application Engineer (Contract) Western Digital July 2012 to August 2013

Irvine, CA

Controlled testing Linux embedded systems, firmware, beta and released hardware/software for NAS and WDTV products PC’s and Macs.

Configured testing environments for hardware, software testing, compatibility testing, white box, black box, gray box testing, and troubleshooting customer return related issues hardware and software.

Assist in the validation, documentation and training of new products and software releases.

Testing web based applications using cross-browsers and debugging using Chrome Developer Tools, Firebug, IE Developer Tools and Dragonfly used WireShark to troubleshoot network.

MICHAEL ROMAN Page Two

Supported continuous improvement of our products through software quality assurance activities, including testing and documentation of product issues using QA Methodologies SDLC and Agile (Regression and Continuous deployment).

Documented software defects using bug tracking system and reported defects involving program functionality, output, online screen and content to software developers.

Electrical Engineer Raytheon July 2005 to June 2012

El Segundo, CA

Tested and troubleshot RTOS software and hardware embedded systems.

Developed and implemented tests programs and test instructions for RTOS embedded boards running Linux.

Produced test procedures for Programming Controller cards, test diagrams using Xlinix iMPACT for FPGA/CPLD devices.

Designed board level test fixtures for production and repair depot.

Using DMM and oscilloscope to troubleshoot systems down to component level.

Configured first article test environments for hardware, software testing, compatibility testing, and qualification testing.

Headed testing and qualified alternate components to support obsolescence.

Formalized concise detailed test plans and test cases from hardware and software requirements.

Completed Raytheon 6 Sigma Green Belt certification.

California State University at Long Beach, Long Beach, CA Aug 2000 to June 2004

Sr. Quality Engineer (Consultant) Hirsch Electronics Oct 1999 to Aug 2000

Irvine, CA

Developed and implemented Engineering Test Standards, test scripts, test plans to ensure product backward compatibility.

Responsible for all new prototype systems and software testing, ECO’s, ECN’s, and BOM’s.

Troubleshooting systems to component level to collect test data on beta and first article systems.

Configured customer environments for hardware and software, black box, white box testing and compatibility testing.

Implemented bug tracking system using Test Track and developed test scripts using Visual Test and Power Shell.

Wrote test procedures for testing web applications tracked failures using Bugzilla.

Assisted in the validation, documentation, and training of new products and software releases

Sr. Quality Engineer Toshiba America (TAIS) Oct 1997 to Oct 1999

Irvine, CA

Coordinated a Root Cause Analysis (RCA) Lab with 5 technicians for Notebook system failures, which included troubleshooting completed systems, setting priorities, distributed daily RCA reports and presenting RCA data to supplier, purchasing, and management team.

Troubleshooting board level and peripheral failures to component level using DMM’s and oscilloscope.

Implemented ECO’s to change components and rework systems.

Oversaw System Integration on final hardware, software compatibility testing on the Toshiba latest computer systems and peripherals.

Worked with OEM suppliers to resolve hardware failures verified all reported fixes.

Designed test fixtures and implemented into production lines and maintained regression test procedures for released hardware / software fixes.

Project Engineer AST Computers July 1987 to Oct 1997

Irvine, CA

Coordinated all internal and external system testing for OEM notebook, all releases of the system BOM's, along with key components, peripherals and customer software.

Oversaw component and integrated systems design. Cost estimates, created proposals and negotiated agreements with vendors. Dealt with vendors in Taiwan, such as Compal Electronics, Quanta Computers, and suppliers located at Hsinch, Science Park.

Troubleshooting systems/boards and LCDs to component level using DMM, oscilloscope, and logic analyzer.

Designed test process and installed test fixtures for production and trained production on new released products.

Configured hardware/software prototype testing, first articles including BOM’s, ECO’s and ECN’s.

Introduced an on-line formatting process that enhanced quality and through put of the notebook assembly lines by 40% with a cost savings of $125,000.

EDUCATION

BS-Electrical Engineering 2004

California State University at Long Beach, Long Beach, CA

Major: BS-Electrical Engineering

Emphasis: Digital and Analog Circuit Design

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