Project Engineering

Resume

Sanjog Bhikuram Janwalkar

Email ID : ********@*****.*** Contact : 988*******

********@*****.**

Passport No.: J1706142

Work Details:

Company

Name

Designation From To Nature of Work

LSI R & D, Pune RTL Verification

Intern

19/08/2013 30/06/2014 I have worked in LSI India R & D, Pune as an Verification Intern.

Work involved writing testcases to

verify PCIe subsystem and shell

scripting to automate simulation

flow.

UPL Powertech

Ltd.

Instrumentation

Engineer

23/12/2010 30/06/2012 Maintenance of Steam and Water Analysis System- Silica Analyzer-Ph

Analyzer- Conductivity Analyzer-

etc.

TECHNICAL SKILLS:

C Programming language and Data Structures

Embedded Operating Systems (Linux, Linux Device Drivers)

Real Time Operating System (FreeRTOS)

Microprocessors and Microcontrollers (AVR, ARM Cortex M3)

Core JAVA

Socket Programming.

ACADEMIC PROFILE:

Degree College University Year Percentage

PG-Deploma in

Embedded

System Design

CDAC ACTS,Pune NA 2016 76.86%

M.Tech.(VLSI &

Embedded

System )

College of

engineering Pune Pune university 2014

CGPA

8.38

B.E.(Electronics) Finolex Academy,

Ratnagiri.

Mumbai University 2010 71.79%

H.S.C

S.D.G.K.

Vidyamandir,Guha

gar

Kolhapur Board 2006 85.33%

S.S.C. New English school

Patpanhale.

Kolhapur Board 2004 86.53%

CDAC PROJECT WORK:

Project Name : Advanced Verification of Next Generation PCIe Subsystem Platform : Linux Device driver,LPC1768 Microcontroller, Keil IDE Description : In this project we have implemented USB Test and Measurement Class for communication between Linux machine and LPC1768 NGX Blueboard.USBTMC protocol is used for exchanging messages between host and devices.In firmware, we have programmed the USB device controller of LPC1768 as a USBTMC device.This protocol gives us an idea about how to abort a pending I/O operation, and how to control our device.

M. TECH. PROJECT WORK:

Project Name : Advanced Verification of Next Generation PCIe Subsystem Platform : PCIe bus, System Verilog,Synopsys VCS

Description : My project is based on verification of Serializer and Deserializer in Physical layer of PCIe Bus which is subsystem of PCIe using PIPE specs. I have used Synopsys VCS (Verilog Compiler Simulator) tool for compilation and simulation purpose and DVE (Discovery visualization Environment) for signal waveform viewing and debug purpose. Also I was part of scripting done to automate compilation and simulation flow using shell scripts.

B.E. PROJECT WORK:

Project Name : Microcontroller based Annunciator and Controlling system Platform : AVR Microcontroller,Keil IDE

Description : Microcontroller used in the project looks after the entire fault-finding process, such as reading the inputs, interpreting the faults by sensing the voltage level at its input ports and indicate it by glowing LED lights and on LCD display. It can be used in chemical, automobile, manufacturing industry, hospitals, theaters, etc. PERSONAL INFORMATION:

Name: Sanjog Bhikuram Janwalkar.

D.O.B: 2nd Jan 1989.

Sex: Male.

Permanent

Address:

At-Janwale, Post-Shringartali, Tal-Guhagar,

Dist-Ratnagiri -415724.

Local

Address:

M-16/539, Darpan,Shahu college road, Laxminagar,Parvati, Pune-411009.

Languages: English, Hindi & Marathi.

I consider myself familiar with VLSI and Embedded system engineering aspects. I am also confident of my ability to work in a team. I hereby declare that the information furnished above is true to the best of my knowledge. Place:-

Date:- (Sanjog Bhikuram Janwalkar)

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