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Engineering Project

Location:
KL, 673001, India
Posted:
March 10, 2016

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Resume:

RESUME

SREERAG K K S/o K Sadanandan

**********@*****.*** Sruthi(H),Thrikkuttissery

Vakayad(Po),Naduvannur(Via)

Calicut (Dt), 673614

+919*********

Career Objective:

To secure a challenging position where I can effectively contribute my skills as an Electrical & Electronic Professional, possessing competent technical skills. Educational Qualifications:

Technical Skills:

System Verilog, Verilog design and verification, FPGA based implementation. Languages & development tools known:

System Verilog, Verilog, Xilinx ISE, Microwind, DSCH2, PSpice, VHDL, C,C++, Tannar EDA Tool

Examination

/Level

Discipline/

Specialization

School/college

Board/

University

Year of

Passing

%

M.Tech VLSI Design NCERC, Pampady University of Calicut 2015 7.12(CGPA) B.E

Electrical &

Electronics

Engineering

PAAVAI college of

engineering,

Namakkal

Anna University,Chennai

2013

7.2(CGPA)

Higher

Secondary

Computer

Science

PPMHSS Kottukkara State Board of Kerala

2009

84%

S S L C S S L C PPMHSS Kottukkara State Board of Kerala 2007 93% Academic Projects

Project 1(B.E): Railway Crack Detection Scheme Using IR Transmitter Receiver Assembly Using GPS & GSM Suppport.

Description : This Project proposes a cost effective yet robust solution to the problem of railway crack detection utilizing the GPS and GSM modules for positionng and communication of detected crack respectively.The scheme has a detector assembly using the arrangement of IR transmitter and receiver.

Project 2(M.Tech): Energy Efficient LFSR Design with P-FF Based On Signal Feed Through Scheme Description: In this project, an energy efficient flip-flop (FF) design featuring an explicit type pulse- triggered structure and a modified true single phase clock latch based on a signal feed- through scheme and its application on a linear feedback shift register (LFSR) is presented Seminars:

1. Thin-Film Transistors And Circuits Based on Carbon Nanotubes 2. Fabrication of A Low Noise Carbon Nanotube Field Effect Transistor Biosensors Awards/Achievements:

Second Place In Technical Quiz Competition In National Conference Conducted By Paavai College of Engineering.

Presented A Paper on Thin-Film Transistors And Circuits Based on Carbon Nanotubes In National Conference Conducted By NCERC, Pampady.

Presented A Paper on Energy Efficient LFSR Design With P-FF Based On Signal Feed-Through Scheme In International Conference ICIIECS’15 Conducted by Karpagam College Of Engineering.

Published A Paper Titled Energy Efficient LFSR Design With P-FF Based On Signal Feed-Through Scheme In An International Journal (KJER).

Personal Profile:

Name : Sreerag K K

Father’s Name : Sadanandan K

Sex : Male

Marital Status : Single

Religion : Hindu

Nationality : Indian

Hobbies : Driving and Travelling

Languages Known : English (Read, Write, Speak)

Malayalam (Read, Write, Speak)

Tamil (Read, Speak)

Hindi (Read, Write)

Permanent Address : Sruthi(H),Thrikkuttissery

Vakayad(Po),Naduvannur(Via)

Calicut(Dist),673614

Phone No : 049*-*******, +919*********

Date of Birth : 21-04-1991

Declaration:

I hereby declare that the above-mentioned information is correct up to my knowledge and I bear the responsibility for the correctness of the above-mentioned particulars. Place: Balussery (Sreerag K K)

Date :



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