Project Developer

CURRICULUM VITAE

K. HARIKA

mail:- *********@*****.*** Mobile: +91-879*******

Career Objective:-

To work for an organization’s growth in order to enhance my skill and knowledge as well as to achieve excellence, to be resourceful and optimistic and to pursue a challenging career in ASIC Design/Verification.

Skills in ASIC Verification:-

oExperience in writing RTL models in Verilog HDL and Test benches in System Verilog.

oVery good knowledge in verification methodologies, especially in UVM.

oExperience in using industry standard EDA tools for the front-end design and Verification.

oUnderstanding of the ASIC design flow.

oHave conceptual knowledge in RTL Coding, FSM based design, Simulation, Regression, Code Coverage Functional Coverage.

VLSI Domain Knowledge:-

oHDL : Verilog

oHVL : System Verilog.

oTB Methodology : UVM(Universal Verification Methodology)

oEDA Tools : Questa Sim(10.0b)

oScripting : Perl and UNIXBasics.

oOperating Systems : Windows,Linux OS.

oProtocol Implemented : UART Design,Verification Implemented in UVM

oProtocols Knowledge : UART, APB, FIFO.

Academic Qualification:-

Degree

Year

School/College

University

Percentage

B.Tech(E.C.E)

2014

S.K.T.R.M.C.E

JNTUH

73

Intermediate

2010

Kottam Manikyammma Jr.college

BOI

65

A.I.S.S.C.

2008

J.N.V

AISSC

67

Projects during course:-

Project#1

Project Title

FIFO

Duration

4 Months

Team Size

Individual

EDA Tools

QUESTA-SIM (Mentor Graphics)

Description

FIFO is abbreviation for First-In-First-Out. FIFO is Used in Many Designs. For Example the Network Designers will make use of FIFO avoid the Data Loss(by matching input the Data Rate to Output Data Rate)

Roles & Responsibilities

As a developer

Developed RTL code

Verified in SV

Developed Components like Sequencer, Driver, Monitor and ScoreBoard to Build UVM environment.

Created a Basic Test class which is inherited by multiple tests to accomplish various Scenarios.

Developed Coverage Model for FIFO

Analyze the Output and Results Verified.

Project#2

Project Title

APB Protocol Using

Duration

6 Months

Team Size

Individual

EDA Tools

QUESTA-SIM (Mentor Graphics)

Description

APB is a Part of Advanced Micro Controller Bus Architecture (AMBA) Protocol Family. This is Mainly Intended for Less Interface Complexity and Low Power Consumption Peripherals.

Roles & Responsibilities

As a developer

Developed RTL code

Verified in SV

Developed Components like Sequencer, Driver, Monitor and Scoreboard to Build UVM environment.

Created a Basic Test class which is inherited by multiple tests to accomplish various Scenarios.

Developed Coverage Model for APB Protocol

Analyze the Output and Results Verified.

Project Title

UART Protocol

Duration

2 Months

Team Size

3 Members

EDA Tools

QUESTA-SIM (Mentor Graphics)

Description

UART is the popular method of serial asynchronous communication. Typically UART is connected between a processor and a peripheral. To the processor, the UART appears as an 8 bit read-write parallel part that performs serial-to-parallel conversions for the processor, and vice versa for the peripheral.

Roles & Responsibilities

As a developer

Developed RTL code

Verified in SV

Developed Components like Sequencer, Driver, Monitor and ScoreBoard to Build UVM environment.

Created a Basic Test class which is inherited by multiple tests to accomplish various Scenarios.

Output is analyzed and Results are verified.

Project#3

Projects during B.Tech:-

Title: Patient Based Monitoring System

Description: - This Project Describes the design of simple, low cost micro controller based Heart Rate and Body Temperature measuring device with LCD output. Heart Rate of the Subject is measured from the index finger using IRD (infra-Red Device Sensors and the rate is then averaged and displayed on a text based LCD). It will check saline level using some conductor. After calculating these reading, it will give continuous report of patient to doctor through GSM module

Mini project:-

Title: Transistor based secrete bell

Description:-This is mainly for security purpose. It will horn through buzzer when any person comes to our place. We have to place our input device (used micro phone) inside secrete place. If any person sounds near to it, it makes sound.

Personal Details :-

Name : K. Harika

Date of Birth : 15th July 1993

Gender : Female

Nationality : Indian

Marital Status : Unmarried

Languages Known : English, Hindi, Telugu and Kannada.

Declaration:-

I hereby declare that all the details furnished above are true to the best of my knowledge.

Place: Bangalore.

Date : [HARIKA]

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