Paul Gigliotti

Profile

Electronics design engineer with programmable logic design background. Expert in all areas of Xilinx tools and devices. Excellent technical, analytical and communication skills. Skills

Digital electronics design

Xilinx FPGA technology

Proficient in VHDL

Some Verilog experience

Xilinx ISE toolset

Xilinx Vivado toolset

High level HLS experience

SOC Architecture and Development

Customer Support

Strong presentation skills

Team player

Past Modelsim Experience

Familiar with Mathworks Simulink

Professional Experience

Xilinx Specialist FAE

January 2011 to January 2016

Avnet Solon, Ohio

Converted Altera LPM based VHDL library to Xilinx Vivado IP catalog based library. Devised novel scheme to increase PWM resolution by 4x at max clock rate Architected buffering scheme for image recognition application Experience with FPGA implementation of multi-gigabit transceivers used for PCIe Gen1/2/3 Converted multiple Foundation and ISE designs to Vivado. Expert with ISE and Vivado tool chains.

Experience working with Xilinx 7-Series, Zynq, and Utlrascale, as well as previous generation devices Familiarity with various IP cores including PCIe, JESD204B, Aurora, MIG, Microblaze, etc. Successful FAE, providing technical sales and support of the entire Xilinx product line. Supported region encompassing all of Ohio, Western Pennsylvania, Northern Kentucky, and Eastern Michigan. Served as a "valued adviser" to customers.

Adept at selecting the right devices and tools to solve design challenges. Xilinx FAE

April 1996 to November 2010

Xilinx San Jose, Ca

Devised novel approach for a customer for a multi-channel serial to parallel conversion using time-skew buffers and distributed RAM that reduced the logic footprint by an order of magnitude. This resulted in an Application Note and Xcell Journal article being written, as well as a patent investigation. Manually converted C source to VHDL (Pre-HLS) for advanced engine control application Created highly efficient in-line Bayer to RGB converter for imaging system Experience working with all 3000/4000, Spartan, and Virtex families, as well as 7-series. Expert with ISE tool chains.

Converted multiple Foundation designs to ISE

Familiarity with various IP cores including PCIe, Aurora, MIG, Microblaze, etc. Successful FAE, providing technical sales and support of the entire Xilinx product line. Supported region encompassing all of Ohio, Western Pennsylvania, Northern Kentucky, and Eastern Michigan. Served as a "valued adviser" at strategic accounts including Rockwell, ECI Telecom, Lucent, and others. Adept at selecting the right devices and tools to solve design challenges. Excellent at establishing customer relationships.

Experience with a wide range of markets including Medical, Industrial, Military, and Communications. FAE

July 1994 to April 1996

9000 Hickory Lane, North Royalton Oh 44133

Home: 440-***-**** - Cell: 216-***-**** - act7tv@r.postjobfree.com Marshal Industries Solon, OH

Proved that fixed point DSP would not be able to meet the design requirements, and migrated customer design to floating point.

Designed FPGA to interface DSP to A/D and backplane, Successfully managed technical sales and support of the entire product line including DSPs, microprocessors and all programmable logic.

My region spanned northern Ohio and western Pa.

Established and maintained excellent relationships with customers. Senior Engineer

April 1992 to July 1994

Gould Test and Measurement Valley View, OH

I was responsible for the architecture and design of the VME based video subsystem for a data acquisition system. The design was implemented using multiple programmable logic devices from Actel and Xilinx, as well as multiple MIPS processors.

Developed the software specification.

Design Engineer

April 1990 to April 1992

Bell+Howell Seven Hills, OH

Developed interface from ASICs to print engine, using PALs and GALs. Wrote diagnostic software for board testing.

Developed test software for image compression ASICs Design Engineer

June 1987 to April 1990

Bailey Controls Wickliffe, Ohio

Designed and developed numerous IO boards as well as an ASIC Avionics Technician

September 1977 to December 1981

USAF Bitburg, Germany

Maintained and repaired radar, navigation and control systems for the F-15. Received Airman/Technician of the quarter in 1981. Received an Honorable discharge

Education and Training

Bachelor of Science : Electrical Engineering

Cleveland State Cleveland, OH, USA

Magna Cum Laude

3.75 GPA

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