RESUME
SHIVANAPPA MANTUR Mobile: +91-874*******
***********@*****.***
OBJECTIVE
Aspiring for challenging and responsible assignments, explore strengths and potentials in a growth oriented organisation to meet employers and self-satisfaction. TECHNICAL SUMMARY
Very good knowledge of Software Development Life Cycle and various models of SDLC.
Knowledge of the open source technology like Eclipse, Tomcat.
Good Knowledge of Core Java, J2EE and Hibernate.
Good in Inheritance, Polymorphism and Abstraction.
Very Good in Collection Framework Library in java.
Knowledge in Multithread Programming.
Very Good Knowledge of Servlet and Servlet life Cycle.
Good Knowledge in JSP and Hibernate Concepts.
Having good understanding RDBMS concepts and SQL. EDUCATION PROFILE
QUALIFICATION SCHOOL/COLLEGE
YEAR OF
PASSING
PERCENTAGE
M.TECH
[VLSI and Embedded
Systems]
Sri Siddhartha Institute of Technology,
Tumkur 2015
85.7%
(9.32 CGPA)
B.E
[Electronics and
Communication]
Government Engineering College, Haveri
2013
68.47 %
PUC
[PCMB]
Basaveswara Science College, Bagalkot 2009 55.50 % S.S.L.C Sri Maruti High School, Alagundi B.K 2007 82.56 % TECHNICAL SKILLS
Programming Languages : Java, J2EE, Hibernate, SQL. Development Tools : Eclipse, Edit plus.
RDBMS : MySQL, Oracle 10g.
Web Technology : HTML, CSS.
Web/Server Application : Apache Tomcat v6.x.
Operating Systems : Windows, UNIX.
ACADEMIC ACHIEVEMENTS
Pursuing a Java, J2EE course at JSPIDERS, Bangalore under Mr. Keshav and Mr Praveen.
Participated in two International and National Conferences.
Participated in 3 Days Workshop on “Certified Ethical Hacking Expert” Organized by Techdefence Pvt. Ltd.
PROJECT @ JSPIDERS
Project : “LIBRARY MANAGEMENT SYSTEM”, 2015-16.
Environment: Eclipse and Apache Tomcat v6.x(Server). Description: In this project I develop a Dynamic Web Site for managing all library books and student’s details and book allotment and receiving functionality using java, J2EE concepts. Web pages are designed using HTML and CSS language. M.TECH PROJECT
Project : “DESIGN AND IMPLEMENTATION OF 8X8 REVERSIBLE SQUARE QUANTUM CIRCUITRY ON FPGA”, 2014-15.
Environment: Xilinx-13.1, FPGA (Spartan-3) and Libero-IDE. Description: In this project I propose a new design to produce square computation by using reversible gates. The design consists of reversible Toffoli, Peres, and Double Peres Gates. Calculate Quantum cost, Garbage outputs, Constant inputs and Gate count. PERSONAL DETAILS
NAME : Shivanappa Mantur
FATHER’S NAME : Veerappa
MOTHER NAME : Sharada
DOB : 01-06-1991
GENDER : Male
MARITAL STATUS : Unmarried
LANGUAGES KNOWN : English and Kannada.
ADDRESS : C/o. #39 P-2, H.Govindraju Building
Kodandaramanagara, Halanayakanahalli
Sarjapur Road, Bangalore, Karnataka - 35
DECLARATION
I hereby declare that the above information furnished is true to the best of my knowledge and belief. Date :
Place : SHIVANAPPA MANTUR