system verilog

CAREER OBJECTIVE:

To pursue a challenging career involving my technical, analytical, and interpersonal skills to give an outstanding performance to the organization with utmost dedication and commitment to the mission and vision of the team and the organization.

ACADEMIC QUALIFICATION:

Now pursuing M.Tech program specialized in VLSI & Embedded Systems in MITS, Madanapalle & obtained 8.5 CGPA till now.

In 2014 received B.Tech degree in the field of Electronics & Communications Engineering from KKIT, Kurnool (Affiliated to JNTUA) with 75.3%.

In 2010 completed Intermediate (MPC) in Sri Saraswathi Vidyalayam, Kadapa with 96.8%.

In 2008 finished SSC in S.B.V.R High School, Badvel with 78.5%.

PROJECTS:

TITLE: AXI VIP Development using SystemVerilog

a.Description:

i.VIP component development for AXI3.0 protocol. As part of this project we have developed BFM, Generator, Monitor, Coverage models. We have also developed basic scenarios targeting all features of AXI protocol.

b.Tools used: Questasim

c.Duration: 6 months

d.Responsibilities:

i.Developing VIP architecture

ii.Coding VIP components

iii.Validating AXI VIP using AXI slave model.

TITLE: Hardware platform for vehicular tracking and monitoring.

Description : Hardware platform for vehicular tracking and monitoring is used to protect vehicles from the hacking people with the help of GPS, GSM and security switch. If anybody moves the vehicle without unlocking the switch then microcontroller can detects the signal by using a security switch and send SMS to vehicle owner. Using GPS system we can get the location of vehicle in term of latitude and longitude values and it can send the message to authorized mobile numbers using GSM service

TECHNICAL SKILLS:

Programming Languages : C, VHDL, Verilog HDL,System Verilog.

Scripting Language : PERL

Packages : MS Word, MS Power Point, MS Excel.

Operating System : Windows, LINUX.

WORKSHOPS ATTENDED:

Attended on “VLSI DESIGN VERIFICATION AND TESTING” organized by the Department of Micro & Nanoelectronics, School of Electronics Engineering at VIT University, Vellore.

Attended on “AUTONOMOUS ROBOTICS” workshop conducted by i3indya Technologies at IIT Hyderabad.

EXTRA-CURRICULAR ACTIVITIES:

Participated in “ROBOMONIA” at Electronica, A National level student technical symposium organized by department of electronics and communication engineering in G. Pulla Reddy Engineering College, Kurnool.

Participated in “NATIONAL SERVICE SCHEME (NSS)” Volunteer for special camp.

AREA OF SPECIALIZATION:

Switching theory and logical devices.

VLSI Technology.

FPGA Deign.

STRENGTHS:

Positive Attitude.

Eager to learn new things.

Ability to work as an individual as well as in group.

PERSONAL DETAILS:

Name : A.Nagarjuna Reddy

Father’s Name : A.Subba Reddy

Nationality : Indian.

Date of Birth : 08th September 1992.

Languages Known : English, Telugu.

DECLARATION: I hereby confirm that the information given above is true to the best of my knowledge.

Date : A.Nagarjuna Reddy

Place :

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