Design engineer

Pranit Jannawar

612-***-****, ********@***.*** **04 Royal Drive, Apt 8, Santa Clara, CA, 95050

OBJECTIVES

Seeking a full time position. Have 2 years of hands on lab experience, VR design, SMT/SMD soldering, rework,

Bring-up, functional verification

WORK EXPERIENCE

SSR Labs (San Jose, CA) (Oct 2015- Present)

oIoT controller and board design for high speed memory management unit for high performance computing (HPC)

oVerification and debugging at simulation and hardware level

NVIDIA Corporation (Santa Clara, CA) (Jan 2015- Apr 2015)

oDesign, validation and debug baseboards for GPUs. Signal integrity, power integrity, eye diagram

oDC-DC converter and power supplies design and debug based on VR configuration

oSchematic, layout review and component/sensor selection from vendor/suppliers

oWorking with cross functional teams to standardize and execute the test development process

Intel Corporation (DuPont, WA) (June, 2013- Jan 2014)

oBench and system level validation of baseboards and debugging failure tests on SSDs and DIMMs

oVR design for low voltage rails using TI parts in buck topology

oPower characterization of Xeon processor in different power and sleep states for Dell POWEREDGE series

EDUCATION

Master of Science in Electrical Engineering June 2015

University of Minnesota, Twin Cities, Minneapolis, MN

Bachelor of Technology in Electricals and Electronics Engineering April 2012

Jawaharlal Nehru Technological University, Hyderabad, India

SKILLS-SETS

Languages : C/C++, Verilog, Perl, Python, Tcl, Matlab

Lab hardware: Frequency Response Analyzer, Agilent data acquisition, Oscilloscopes, multi-meters, BERT

Platform : Windows and Linux

Simulation and Test Tools : Cadence Allegro, Capture CIS, Synopsys Design Compiler, Intel® Power Thermal Utility, HSPICE, OrCAD

ACHIEVEMENTS

Intel Recognition Award (Nov 2013)

My work was appreciated by the team on processor power performance characterization. I was awarded a cash prize and Intel team building point by my Team Lead and Manager.

ACADEMIC PROJECTS

Quad-bot design using accelerometers

oDesigning a low power light weight robot which can fly with multiple functionality

oSmall sized carbon fiber fuselage was used as backbone

oModels were then used as remote monitoring systems using on-board camera

Automation of digital circuit using Perl scripting

oTo obtain ratio of PMOS to NMOS for fastest operation and equal rise/fall time for ring oscillator

oScript was written to find the delay for all the variation in sizes

oSlowest and fastest frequency of operation was calculated for different PVT conditions

o3D plots were obtained using output of perl script to find best and worst case of operation

Embedded Piezoelectric cell in Jogging Tracks

oUsing hardware tools to design the schematic and layout of a dynamic energy source

oLarge sized cell were laid in track to maximize the pressure impact

oNumber of cells were optimized to power up the jogging track for evenings

Viterbi Decoder design using Verilog

oConvolution code and Trellis pattern were designed. Static Timing Analysis was used to meet timing constraints

oTest coverage (ATPG) was improved by coding techniques and avoiding inferred latches

oSynthesis and exhaustive verification was done to deal with all the possible outputs using input vectors

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