Layout Engineer, Design Engineer, Product and Validation Engineer

Sailaja Radhakrishnan *****.****@*****.***

**** **** *** ***** ***. N, Chandler, Arizona - 85249 480-***-**** Objective

Seeking an entry level fulltime position in the areas of Design, Product, Quality Control or Validation Engineering in the semiconductor industry.

Education

Master of Science in Integrated Electronic Systems December 2010 Arizona State University, Mesa, Arizona GPA: 3.8/4.0 Bachelor of Technology in Electrical & Electronics Engineering August 2003 - May 2006 Jawaharlal Nehru Technology University, Hyderabad, India Diploma in Electrical & Electronics Engineering August 1999 – May 2002 State Board of Technical Education and Training, Hyderabad, India Graduate Research Projects

1. Layer Deposition Technology: Analyzed how layer deposition technology used materials and process tools to make vital and verifiable contributions to fab competitiveness. 2. Lithography: Determined the factors that influence the layer alignment and critical dimension control of tool design operations.

3. IC Packaging: Researched the importance of Molded underfill for Flip Chip Ball Grid Array. 4. Study and Analysis of Dopant profiles for Ion Implantation using SRIM simulation: Analyzed dopant profiles of boron, phosphorous and arsenic in CMOS fabrication. Characterized the profile based on ion energy, projected range, axial and lateral straggle.

5. Applied Photovoltaics: Designed rooftop PV panel layout for a small scale industry using AutoCAD. 6. Simulated the CMOS structure to understand physics of CMOS fabrication processes like oxidation, ion implantation, layer deposition, pattern transfer.

7. Performed Optical Mask Inspection using BioRad Microscope. Technical & Computer skills:

1. Packages & Tools: PSPICE, MATLAB, Minitab (SPC), SPSS, AutoCAD 2. Programming Languages: C/C++, C#, Assembly level, HTML, SQL 3. Certified on Oracle 9i SQL and PL/SQL.

4. Experience in statistical data analysis, and design of experiments. 5. Underwent training in the working policies and maintenance regulations for a Class 100 clean room with the emphasis on EHS standards.

6. Experience with Scanning Electron, Transmission Electron and, Keyence microscope. Work Experience

Intern, TÜV Rheinland PTL, LLC, Tempe, Arizona August 2013 – May 2014

Statistical analysis of PV Module Qualification test results using SPSS and Minitab. o Analyzed 10 years’ qualification testing data of PV modules with SPSS. o Created statistical models of PV modules passing at upper or lower pass-limit set by the standard using the tool Minitab.

o Computed six sigma Cpk capability measure to calculate how well the modules adhered to the specification after each stress test.

o Transformed models to generate boxplot & histogram to analyze before and after stress tests data. o Determined the influence on Pmax, Vmax and Fill-Factor for modules tested under various stress tests. Project Engineer, TÜV Rheinland PTL, LLC, Tempe, Arizona December 2011 – June 2013

Managed interns and lead the team for reports, activations and data processing.

Issued certificates for all testing standards according to IEC, CA and UL industry guidelines.

Worked with clients to mitigate issues with certificates, compiled & generated industry standard certificates.

Created the Factory inspection database, and lead the report automation project. Intern, TÜV Rheinland PTL, LLC, Tempe, Arizona August 2010 – November 2011

Carried out Electroluminescence testing and infrared imaging for characterization and analysis of PV Modules.

Experienced in recording I-V curves of PV modules with single/multi-curve tracers.

Performed high voltage electrical insulation testing, electrical & performance characterization of photovoltaic modules.

Performed data acquisition, data monitoring, and data analysis & reporting using analysis tools Matlab, MS-Excel and further created a thermal model of the analyzed data. Research Assistant, Engineering Technology Department, ASU May 2009 – July 2010

Involved in the design of experiments, research in using different electrolytes, testing their influence on the efficiency of Dye Sensitized Solar Cells. Increased efficiency from 4% to 8.2% by scaling down the cell dimensions, achieved further gains up-to 10.2% by changing electrolytes, the highest in ASU labs.

Used SSPS and Origin to analyze IV and Impedance characteristics.

Produced Dye Sensitized Solar Cells with various TiO2 film thicknesses and electrolyte to enhance cell efficiency and improve fill factor.

Standardized the fabrication procedure of Dye Sensitized Solar Cells in Arizona State University lab. Intern, National Aerospace Laboratories, Bangalore, India January 2006 – April 2006

Worked in a team of three to design a system for remote controlling of A.C.Motor.

Used the embedded system for controlling the speed of A.C.Motor to improve the accuracy and efficiency by remote controlling. The system used R.F. communication to control the motor. Relevant Graduate Courses:

1. IC packaging

2. Layer Deposition Technology

3. Pattern Transfer Technology

4. Semiconductor Technology Practical

5. Introduction to Materials Characteristics

6. Statistical Process Control

Relevant Undergraduate Courses:

1. Linear & Digital IC Applications Control Systems 2. IC & Pulse and Digital circuits

3. Networks lab Computer organization Microprocessors and interfacing 4. Instrumentation Digital Signal Processing

5. Power Semiconductor Drives

6. Microprocessors lab

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