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Higher Secondary Design

Location:
Chennai, Tamil Nadu, India
Posted:
December 24, 2015

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Resume:

PRABAKARAN A

D.No:*/**, Godupatti(vill), acswk6@r.postjobfree.com

Dhasampatti (Po), +91-959*******

Pennagaram (Tk),

Dharmapuri (Dt)-636810

CAREER OBJECTIVE

To utilize my technical proficiency in a challenging working environment for the development of the company and myself

PGDVLSI Feb 2015 – Aug 2015

CDAC, Noida

Percentage: Grades yet to be declared

M.E ( VLSI DESIGN) 2013-2015

Bannari Amman Institute of Technology, Erode

Percentage: 88.4%

B.E ( Electronics and Communication Engineering ) 2009–2013 K.S.Rangasamy college of Technology, Tiruchengode

Percentage: 80.1%

H.S.C – 2009

M.A.M higher secondary school, Mettur.

Percentage: 88.91%

S.S.L.C –2007

Government Boys Higher Secondary School, Pennagaram Percentage: 70%

• Physical Verification : DRC, LVS, RC extraction

• HDL Languages : Verilog, VHDL

• Simulation Tools : Mentor Graphics pyxis IC, Xilinx ISE, Modelsim

• Digital Design and Synthesis Using Verilog HDL

ACADEMIC DETAILS

TECHNICAL SKILLS

AREA OF INTEREST

• Project in Under Graduate

Title : “ Performance and analysis of SRAM using TSMC 180nm Mentor graphics tool” Description: High speed write operation in a low power circuit with reduced leakage current. The SRAM are designed and simulated with the help of Mentor Graphics tool

• Project in Post Graduate

Title: “Enhanced a security level of AES engine using DPA counter measure circuit” Description : AES is a symmetric encryption algorithm .By implementing the LFSR with the AES technique we have increased the security level

• Project in PGDVLSI

Title : “Design of efficient FIR filter using MCM in Verilog” Description : Multiple Constant Multiplication (MCM) is a hardware efficient technique which is used to reduce the number of multiplication and additions

• Attended One day workshop on “VLSI and FPGA based System Design” conducted at NIT, Trichy which is held on 14 December 2014

• Participated in the college-level “Texas Instruments Innovation Challenge- India Analog Design Contest” held at Bannari Amman Institute of Technology, Sathyamangalam

• A paper titled “Performance and Low Power Comparison Of Dynamic Comparator in CMOS”is accepted in the proceedings of National Conference on Signal Processing Communication & VLSI Design in Anna University Regional Centre, Coimbatore which is held on 9th and 10th of May 2014

• Member of Institute of Electronics and Telecommunication Engineers (IETE)

• Organized Technical Symposium in K.S.Rangasamy College Technology Date of birth : 03.06.1989

Father’s Name : P.Arumugam

Mother’s Name : A.Manimegalai

Languages Known : English, Tamil

Nationality : Indian

Hobbies : Playing Cricket

Place:Bangalore

Date: (PRABAKARAN A)

ACADEMIC PROJECTS

CO- CURRICULAR ACTIVITIES

EXTRA

RAAA

- CURRICULAR ACTIVITIES

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PERSONAL PROFILE



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