Project Engineering

R.VAISHNAVI B.E(ECE)

*.***********@*****.***

Mobile: 867-***-****

CAREER OBJECTIVE:

To work in a challenging environment, which upgrades my knowledge, improves my skills and provides a room to give out my best to the organization.

ACADEMIC QUALIFICATION:

Course

University/

Board

Institution

Year of Completion

Marks

B.E(ECE)

Anna University,

Chennai.

M.P.N.M.J Engineering

College, Chennimalai, Erode.

2014

7.45 CGPA

HSc

State Board

Sengunthar Girls Higher Secondary School, Thillai Nagar, Erode.

2010

78.08 %

SSLC

State Board

Government Girls Higher Secondary School, P.S.Park, Erode.

2008

83.6 %

AREA OF INTEREST:

Embedded System,

VLSI DESIGN.

SKILL SETS:

Basics of Electronics, Microcontroller and Microprocessor .

PAPER PRESENTATION:

Presented a paper on “Low-Power Image Scaling Processor For Quality Images” at J.K.K.Nattraja College Of Engineering And Technology on 28.02.2014 at Komarapalayam, Namakkal.

CONFERENCES ATTENDED:

Presented a paper on “Low-Power Image Scaling Processor For Quality Images” at Aishwarya College of Engineering And Technology on 12.02.2014 at Bhavani, Erode.

Presented a paper on “Low-Power Image Scaling Processor For Quality Images” at KPR Institute of Engineering And Technology on 14.03.2014 & 15.03.2014 at Arasur, Coimbatore.

VALUE ADDED COURSE:

Completed the VLSI Design short term course conducted by LOG IT, Coimbatore on 06.07.2013 to 06.10.2013 at M.P.N.M.J Engineering College.

PROJECT DETAILS:

TITLE : Low-Power Image Scaling Processor For Quality Images.

TEAM SIZE : 4

MY ROLL : To collect the project details, project materials and to prepare the project book for the Phase-1 & Phase-2.

PROJECT DESCRIPTION : Image scaling is a very important technique and has been widely used in many image processing applications. In this project, a low-cost, low-memory-requirement, high-quality and low-power image scaling processor had been proposed. When the image can be zoomed it can be affected by some blurring and aliasing effects, that effects can be cleared using the sharpening spatial and clamp filters. The filter combining hardware sharing and reconfigurable techniques had been used to reduce hardware cost. Bilinear interpolation is selected as an interpolation method due to its low-complexity and high-quality. Spurious-Power Suppression Technique(SPST) adder is used to reduce the power consumption and repeated additions are performed in binary adders. SPST adder is placed in the sharpening spatial and clamp filters. In this project work, an image can be qualified by using the image scaling method with low power below 6mW.

APPLICATIONS : Digital Imaging Devices, Mobile Phone.

PERSONAL PROFILE:

Father’s Name : K.RAMDOSS

Date of Birth : 14.03.1993

Languages Known : English, Tamil

Gender : Female

Passport number : M1423583

Pan card number : AVBPV0832D

Nationality : Indian

Address : Royal Women’s Hostel

No.2/1 Ambal Nagar Main Road,

Ambal Nagar, Chennai -32.

DECLARATION:

I hereby declare that the above mentioned information is true to the best of my knowledge and I am responsible for the correctness of the above mentioned particulars.

Yours faithfully PLACE :

DATE : [ R.VAISHNAVI]

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