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Design Software

Location:
Bengaluru, KA, India
Posted:
December 13, 2015

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Resume:

SWETHA M MANUR

Bangalore,India Email ID: acsscl@r.postjobfree.com

Gender: Female DOB: 01/08/93 Nationality: Indian Phone Number: +919********* Career Objective:

To work in a professional organization and challenging environment which will enhance my intellectual skills providing opportunities for growth. Also further improve my technical skills in order to deliver my best performance towards personal and organizational success.

Educational Qualification:

Course Institution Board Marks

(%,cgpa)

Year of Passing

B.Tech in Electronics,

Design and

Manufacturing

Indian Institute of

Information Technology,

Design & Manufacturing.

Indian Institute of Information

Technology, Design &

Manufacturing, Kancheepuram

9.10 2015

Class XII Sri Sankara Senior

Secondary School

Central Board Of Secondary

Education

95.2 2011

Class X Sri Sankara Senior

Secondary School

Central Board Of Secondary

Education

96.4 2009

Experience:

Synopsys Inc., Bangalore June 22,2015 – Present

Experience skills:

Underwent training in the following industry standard EDA Synopsys tools PrimeTime

Version 2014.06

Complete knowledge of STA flow.

Ability to generate and interpret timing reports.

Conceptually strong at STA concepts .

Design

Compiler

Version 2013.12

Knowledge of DC flow.

Generation of gate level netlist from RTL for a simple design using DC Topographical mode.

Familiar with loading libraries, technology data and floorplan constraints.

Familiar with analyzing and improving congestion concepts. IC-Compiler II

Version k-2015.06

Knowledge of flow required for an efficient design planning, placement, routing and analysis of designs.

Familiar with hierarchical and flat design concepts.

Familiar with ICC-II Commands.

PrimeTime

Signal

Integrity

Version 2013.06

Conceptually strong with crosstalk noise and delay.

Familiar with running PrimeTime SI and identify timing violations due to crosstalk noise and delay. Training skills:

Complete knowledge of ASIC flow and analog and digital design.

Familiar with Unix shell, TCL and Python scripting languages.

Technical skills:

Programming skills: C, Python, TCL,Verilog

Tools: ORCAD Schematic, MATLAB, Lab VIEW, Synopsys PT, PTSI, DC, ICC-2, LVS, Xilinx ISE, Microsoft Office, LTSpice

Platforms: Windows, Unix

Credentials:

Received the Certificate of Merit, CBSE for outstanding academic performance and being the top 0.1% of successful candidates in Science and Mathematics, 2009.

Received the “AMUL VIDYASHREE award in 2010.

Received the Citation of Merit from Dr. Ambedkar Foundation, New Delhi and also received cash award of Rs.40,000 and Rs.20,000 for X and XII class performance respectively conducted by the CBSE. B.tech Project:

Title : Single Channel Wireless EEG

Tools : MATLAB, LabVIEW, AT Mega microcontroller, Zigbee wireless module Software : C

Application : Medical electronic instrumentation.

Description:

Design of a single channel EEG with two electrodes namely Left and Right electrodes, to tap the brain signals at the prefrontal lobes to detect the various aspects related to vision and motion of the eyes and to transmit the brain signals wirelessly.

Internship:

1) HCL, Chennai, Tamil Nadu

Duration: 2months (15.5.2014 to 20.7.2014)

Details: Design and simulation of a wireless RF energy harvesting module. Contribution: Design of a voltage conditioning and storage circuit used for storing the charge obtained by harvesting the RF energy.

Analysis and study of prevalent voltage conditioning circuits that are based on capacitor and a super-capacitor.

Design and simulation of various voltage conditioning circuits that are based on BJT, MOSFET and CAPACITOR to yield a regulated/ constant output voltage. Software used: LTSpice

Multisim

2) LUCAS TVS, Engineering and Research Department, Padi, Chennai, Tamil Nadu Duration: 1.5 Months (20.5.2013 to 28.6.2013)

Details: In-plant training of electrical component’s designing and manufacturing, evaluation and quality analysis.

Design of the logic required to design an equipment to perform tightening of motor assembly fixing a screw with the help of PLC (Programmable Logic Controller) using the software “GX Developer”.

Areas Of Interest:

VLSI

Digital circuits

Analog circuits

Academic Projects:

1. Photo Flash Circuit:

Details: Implementation of a photo flash circuit having 3 modes namely, ON, OFF and FLASH. Software used: Multisim, LTSpice

2. Biomimicry:

Details: A substantial case study was done on the bird “spatuletail”, where its life processes were mimicked in real life events using the tool, biomimicry.

3. Electronic Object Counter:

Details: Implementation of an instrumentation device that can count number of objects which has applications like counting number of people, number of obstacles.

Software used: Multisim, LTSpice

4. Glove Vacuum Cleaner:

Details: Conceptualization and implementation of a product where it is designed and modeled as a glove to work as a portable vacuum cleaner to clean small electronic devices. 5. Redesign on the interiors of an automotive

Details: Conceptualization and innovative redesign done on the interiors of the car 6. Dark Activated Smart Light:

Details: Implementation of a dark activated switch where the LED glows automatically in the absence of light and turns off in the presence of light. The automatic control of ON and OFF of LED was done by interfacing the electronic circuit with FPGA Spartane kit.

Software used: Xilinx ISE

I hereby declare that all the above information is true Date:

Place: Signature:



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