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Project Software

Location:
Bengaluru, KA, India
Posted:
December 02, 2015

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Resume:

RESUME

K.PADMASREE

Mobile No: +91-855*******

E-mail id: p ************@*****.***

OBJECTIVE:

To play a key technical role in an organization where I can contribute to the progress of the company, demonstrate my skills and gain maximum exposure to the emerging technologies and work towards the objective of the organization.

PROFESSIONAL TRAINING:

1. Completed VLSI PDC (Professional Development Course) from Sandeepani School of VLSI. Courses learnt: Digital Design,Verilog,FPGA,System Verilog. EDUCATIONAL QUALIFICATION:

Name of

course

/degree

University/Board Specialization Year

Pass Out

Aggregate

M.Tech JNTUH Embedded

Systems

2015 84%

B.Tech JNTUH ECE 2013 83%

Intermediate AP Board of Secondary

Education

MPC 2008 91%

SSC AP Board of SSC SSC 2006 89%

TECHNICAL SUMMARY:

● Electronic Design Packages : X ilinx ISE project Navigator 14.2, Modelsim6.4a, Questasim 10.1.C, PCB Designing [Eagle EPS],

AutoCAD 2012, E-Designer.

● Programming Languages : Verilog, System Verilog, and C.

● Microcontrollers/FPGA : X ilinx FPGA Trainer Kit Spartan 3E, Spartan-6.

● Familiar OS : Windows XP/7.

INTER PERSONAL SKILLS:

Strong analytical and problem solving skills.

Possess strong written and verbal communication skills

Ability to handle multiple tasks.

Capable to work in a team.

Zeal to learn new things effectively and quickly. PROJECT WORK:

1. FUNCTIONAL VERIFICATION OF IMAGE COMPARATOR (SANDEEPANI PROJECT): Project Description: Our Project main Aim is to generate two RGB images and taken as input to Image comparator and to generate three output files Error file, data log, difference log files using Verilog.

Software Tools : Questasim 10.1.C, GIMP 2.8.14.

2. PATTERN DETECTOR SOFT IP (SANDEEPANI PROJECT):

Project Description: Our Project Main Aim is to develop a Soft IP so that we can use it for any pattern detector. Reusable code for all sequences using Verilog Software Tools : Modelsim 6.4a.

My Responsibility for this project:

i. I Wrote RTL coding and synthesized.

3. TITLE: UNIVERSAL SHIFT REGISTER (SANDEEPANI PROJECT): Project Description: Our Project main aim is to develop a Universal shift Register which will perform SISO, SIPO, PIPO, PISO, Rotate Left, Rotate right, Left Shift, and Right Shift. Software Tools : Modelsim 6.4a.

4. DESIGN SPACE EXPLORATION OF HARD-DECISION VITERBI DECODING: ALGORITHM AND VLSI IMPLEMENTATION (PRIT):

Project Description: VITERBI decoder is one of the most widely used components in digital communications and storage devices. Viterbi algorithm is widely used as a decoding technique for convolutional codes as well as a bit error detection method in storage devices. Software Tools : Xilinx ISe Project Navigator

Hardware used : A dders, Multiplexers, Flip Flops, comparators, Latches. 5. FIRE FIGHTING ROBOT (ELEGANT INSTITUTE):

Project Description: Fire Fighting Robot is Robot which is used to extinguishing the fire and used to sprinkle the water on fire in industries to avoid fire where human cannot be able to enter. Software Tools : KEIL Software (UVISION3), Embedded C. Hardware used : M icrocontroller.

6. MILLING MACHINE (BHEL):

Project Description: MILLING MACHINE is a machine which is used to eliminate the unwanted solid state material from wanted solid state material with automatic sequence of steps by using CNC & PLC without the involvement of human being. Software Tools : Ladder Language.

Hardware used : P LC.

Personal Details:

Father’s name : K. Rama Chary.

Date of Birth : 3R D

April 1990.

Nationality : Indian.

Hobbies : Listening music, Gardening, Cooking.

Linguistic Knowledge : English, Hindi, Telugu.

DECLARATION:

I hereby declare that the above written particulars are best of my knowledge and belief. Place S ignature of candidate

Bangalore K.PADMASREE



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