Engineering Project

Aashiq Banu.S

E-mail: ******.****@*****.***

Mobile: +91-940******* / 828*******

OBJECTIVE

Intend to build my knowledge in this hi-tech environment and use of my

knowledge to fulfill the need of organization by facing challenge to forth

coming environment.

EDUCATIONAL QUALIFICATION

DEGREE/ INSTITUTION/SCHOOL NAME OF Mark CLASS YEAR

COURSE UNIVERSITY Secured OBTAINED OF

PASSING

M.E OXFORD Anna 7.66 CGPA First 2013

( VLSI ENGINEERING University

Design) COLLEGE Chennai

B.E CAPE INSTITUTE OF Anna 70% First 2011

( ECE ) TECHNOLOGY University

HSC KDVPGG.Hr.Sec.School State Board 65% First 2007

SSLC KDVPGG.Hr.Sec.School State Board 76% First 2005

TECHNICAL PROFICIENCY

Programming Languages : Verilog, VHDL, C++, C

Tools : Xilinx, Quartus II, Modelsim,

. Auto CAD 2014,Photoshop.

Operating Systems : Windows XP, 7, 8.

AREA OF INTEREST

Network Security

VLSI Technology

Digital Electronics

PROJECT DETAILS

B.E Project: A Third Generation Design for Inter Networked-

banking And Teller Machine operations Using Universal Subscriber

Identification Modules.

Using this Subscriber Identification Module (SIM), I worked with a method

that customers can access their bank accounts by using SIM in order to

make cash withdrawals, debit card cash advances, and check their

account balances as well as purchase pre-paid mobile phone credit.

M.E Project: Improved Throughput in RC5 Algorithm using Pipeline

Technique.

Authentication acts as the first defense mechanism against the attackers.

In order to guarantee the quality of the advanced systems an efficient and

secure authentication scheme is desired. I came up with a novel

authentication mechanism, in RC5 algorithm for speed and security level

compared to the existing mechanisms.This paper represents RC5

algorithm, pipeline technique and its performances.

PAPER PRESENTATION

International Conference: Improved Throughput in RC5 Algorithm

using Pipeline Technique

CO CURRICULAR ACTIVITIES

Participated in two days workshop on VLSI Applications in Higher data

rate Communications and Signal Processing using ASIC tools

Participated in two days workshop on FPGA Implementation

Participated in two days workshop on VLSI Design

Participated in one day workshop on Network Simulator

Attended in-plant training in BSNL, Trichy

Participated in national level workshop on Network on Chip

Architectures conducted by Oxford engineering college, Trichy.

Participated in National level workshop on MATLAB-SIMULINK &

Applications conducted by IEEE Student Branch Anna University,

Chennai.

Participated in CSIR&DRDO sponsored workshop on Advanced

Communication Networks conducted by Saranathan Engineering

College, Trichy.

PROFESSIONAL QUALIFICATIONS

Excellent verbal and written communication skills

Quick learner

Comprehensive problem solving abilities

Ability to deal with people diplomatically

Willingness to learn team facilitator hard worker

Ability to study and comprehend electrical drawings and details

Ability to understand and analyze customer urgency

AutoCAD Electrical skills

EXTRACURRICULAR ACTIVITIES

NSS candidate and also attended the camp organized by our institution

Student representative in class for Three years in college.

PERSONAL INFORMATION

Father name : Shanavas Munavari

Date of Birth : 02-09-1989

Gender : Female

Citizenship : Indian

Languages Known : English, Hindi, Tamil, and Malayalam.

WORK EXPERIENCE

ORGANIZATION DESIGNATION PLACE DURATION

KSEB, Oct 2014 -2015

WideScan Technologies Digital.Documentation

Trivandrum

Executive

DECLARATION

I do hereby declare that the particulars of information and facts

stated herein above are true, correct and complete to the best of my

knowledge and belief.

PLACE:

DATE :

AASHIQ BANU.S

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