Design Engineer Project

BASAPPA .C MARAPUR

Email Id:********@*****.*** Cell No: +918*********

Objective

To learn every aspect and gain knowledge of Layout design and analysis till the highest limit and to obtain a challenging position with opportunities for carrier growth in Layout Design engineer.

Education

B.E in Electronics and Communication Engineering from KLE Institute Of Technology Hubballi, under Visvesvaraya Technological University (VTU).

Aggregate: 64.66%.

Academic Profile

CLASS

INSTITUTION

YEAR

PERCENTAGE BE 8th semester

KLE Institute of technology Hubballi

2015

72.80

BE 7th semester

KLE Institute of technology Hubballi

2015

69.66

BE 6th semester

KLE Institute of technology Hubballi

2014

69.11

BE 5th semester

KLE Institute of technology Hubballi

2014

64.55

BE 4th semester

KLE Institute of technology Hubballi

2013

54.00

BE 3rd semester

KLE Institute of technology Hubballi

2013

59.22

Diploma

KLE Polytechnic Mahalingapur

2012

71.48

SSLC

Karnataka Secondary

Education Examination Board

2009

82.56

Skill Set

Areas of Interest : VLSI Design.

Languages : C, Microcontroller, Microprocessor.

Software Tool : Cadence Virtuoso,Layout design and Schematic tool.

Major subjects : Semiconductror Device, Logic Design.

Academic achievement

Hands on experiance in Designing of Layout Based Standard cell.

Participated in 5th National level Paper Presentation, Project Exhibition and Dance competition in association with I.S.T.E New Delhi.

Participating TI Analog Maker Design Computation College Level- 2014

Served as the Student Coordinator for the Spoorti organized by KLE Polytechnic Mahalingapur.

Served as the student discipline committee coordinator for the Kushi-2K15 organizes by KLE Institute of Technology Hubballi.

Co-curricular activities

Attended a full-fledged 3 day workshop on BSNL technologies at BSNL Hubli division and had hands-on experience on practices like splicing, types of OFC’s used by BSNL and the detailed demonstration of the communication system which BSNL adopts.

Attended a 4 day workshop on Fundamentals of Circuit theory on 23rd-26th January 2013 series lectures delivered by Dr. P. Subbanna Bhat Technical consultant, Ekalakshya VLSI R &D centre.

Visited Karnataka’s only capacitor manufacturing unit at Tarihal estate Hubballi and learnt about the fabrication process involved in capacitor manufacturing.

Participated in the Analog Design Contest organized by Texas Instruments in 2014.

Projects

Major Project on “DESIN AND IMPLEMENTATION OF 4-BIT LFSR USING D FLIP-FLOP IN 180nm CMOS TECHNOLOGY” SPONSERDE BY SANKALP EKALAKSHYA.

Chip manufacturing technologies have been a key to the growth in all electronics devices. LFSR is implemented using standard cell library up to layout level which will be a key component for low area and power application, LFSR is efficient component to provide self-test of an integrated circuit (IC).

Diploma Project On “Automatic Industrial Control” based on PIC Microcontroller

This project aim is to control the various units of industries, main gate of the industry is controlled by automatically, shows the route indication for unknown vehicles and test the whether condition depending upon the threshold level system will control and take care of the various machine units by automatically.

Strength and Hobbies

I have strong commitment to work.

Ability to work in a team with diverse backgrounds.

Reading Technical books, Net surfing.

Travelling.

Personal Details

Name : Basappa C Marapur

DOB : 26-06-1993

Father’s Name : Chanabasappa G Marapur

Gender : Male

Marital Status : Unmarried

Religion : Hindu

Nationality : Indian

Languages Known : English, Kannada

Permanent Address : C/o: Chanabasappa G Marapur

At/post: Shivapur (H) Tq:Gokak

Dist:Belagavi Pin code: 591312

Contact Number : +918*********

Declaration

I hereby declare that the above written particulars are true to the best of my knowledge and belief.

Date:30/Oct/2015

Place: Shivapur (H) Basappa C Marapur

Contact this candidate