Wenguan Ding
*** ****** ****** **** **. W Apt ***, Cincinnati, OH 45220 • 678-***-**** • *******@*****.*** EDUCATION
University of Cincinnati Cincinnati, OH
Master of Engineering, Electrical Engineering system track GPA 3.6 Aug 2013 – Aug 2015 Shanghai Jiao-tong University Shanghai, China
Bachelor, Microelectronic engineering Sep 2006 – Feb 2011 WORK EXPERIENCE (Board-Level design and layout background) Allwinner Technology Co. Ltd. Shenzhen, China
Hardware Engineer May 2011 – June 2013
Board level hardware schematic design and PCB Layout using Cadence, PADS. Kept up with the whole process of manufacture and failure analysis. z Car DVR Project (using Allwinner Tech F-series chip and A-series chip, ARM architecture, QFP / BGA package)
- Schematic design and PCB layout in mixed digital/analog signals, 4 layers PCB, layout and check by myself
- Power management of the entertainment system including 2 1080p digital sensor modules / 4 CVBS Line-In modules
- Solved the crosstalk issue of backlight power IC (high frequency PWM signal) and audio I/O channel z MP5 Project (using Allwinner Tech F-series chip, ARM architecture, QFP package)
- Schematic design and PCB layout including RF module, 4 layers PCB, layout and check by myself
- Solved ESD and EMC Problem, cooperating with EMI lab, adding ESD devices and optimizing placement and routing
- Made BOM and relevant gerber files, demo board hand making, and troubleshooting. z E-book Project (using Allwinner Tech F-series chip, ARM architecture, QFP package)
- Schematic design and PCB layout using E-ink screen, 4 layer PCB layout by myself and check by Sr HW Engineer
- Solved backlight IC high power consumption issues, using DC-DC boost IC and PMU IC z Video Radio Project (using Allwinner Tech F-series chip, QFP package)
- Kept up with the manufacture process including board making, SMT and assembling, solved SMT issues (low yield)
- Tested backlight power IC, solved the noise issue when turning on and off the backlight IC, PWM signal integrity
- I2C communication failure analysis, USB-OTG circuit design and debug PROJECT EXPERIENCE (VLSI Background and System background) z Mini Programmable Router (MPR) Design (40-pin package, 4 by 4 matrix)
- Sub-circuit (PRU) VHDL design and gate-level structure coding, H-spice and IRSIM simulation
- PRU transistor level layout using MAGIC, netlist abstracted from layout and re-simulated in IRSIM
- Floor plan design of the Mini Programmable Router totally 4 layer(2 metal layers, 1 poly, 1 diffusion) z Capturing of moving objects (Based on Xilinx Vertex2 pro)
- Optimized the depth detection algorithm of two pictures captured from left and right camera, programing in C
- Verified the algorithm in programming C, and optimized and migrated to Verilog HDL SKILLS
Computer Language: C Programming, C++ Programming, Assembly Language (x86 instruction set) Software Package: Cadence, Mentor Graphics PADS (3Y experience, skilled in 4-layer layout), Eagle Lite, Allegro Verilog HDL, VHDL, Hspice, MATLAB, MAGIC
Lab equipment: oscilloscope, Digital Multimeter, logic analyzer, soldering iron, ESD Generator Language Skills: Native in Chinese and fluent in English