Verilog HDL, VHDL, Digital Electronics, CMOS Design, C language

Sarvesh Kumar Maurya

Phone no. – 080********

Email ID- ***************@*****.***

Career Objective

I would work in an organization where there is a union of my interest and scope of development. Academic details

degree Stream Institute Board/Univers

ity

Passing

Year

Degree % Divi

sion

PG-DVLSI VLSI CDAC (Center for

Development &

Advanced

Computing),NOIDA

Center for

Development &

Advanced

Computing (CDAC)

2015 awaiting await

ing

B. Tech Electronics

&

Communicat

ion

Institute of

Engineering &

Technology,

Faizabad, Uttar

Pradesh

Dr. Ram Manohar

Lohia Avadh

University,

Faizabad,

Uttar Pradesh

2014 67.42% 1st

12th Physics,

chemistry,

maths

NSPS TRIPULA

RAEBARELI

UTTAR PRADESH 2010 69.4% 1st

10th Science,

maths

CITIZEN PUBLIC

SCH

SALON RAEBARELI

UTTAR PRADESH 2008 66% 1st

Academic projects

Project name Standard Description

IMPLEMENTATION

OF RMS CALCULATOR

USING VERILOG

PG DVLSI This block calculates the RMS value of a series of numbers. The interface has a flag to indicate the

beginning of a sequence of numbers. The input is a one flag push interface, and the output is a two flag pull interface. The input has a two bit control code.

Code calculates the number of samples, the sum of squares, and provide output (RMS value) when a

result is required.

The booth’s divide and square root algorithms

implemented by using Verilog hardware description

language.

Tool used- ModelSim, Precision synthesis RTL plus TRAFFIC LIGHT

CONTROLLER USING

VHDL

B. Tech(major

project)

Traffic lights are the signaling devices used to manage traffic on multiway road. These are positioned to

control the competing flow of the traffic at the road intersections to avoid collisions by displaying lights

(red, yellow and green).

Implement of finite state machine using VHDL.

Tool used - Xilinx ISE

LINE FOLLOWER

ROBOT USING IR

SENSOR

B. Tech (mini

project)

A line follower autonomous robot that optically

tracks a line made on the surface of the floor using IR Rx/Tx pair by moving right along it.

Component used –

1. IC- LM324,L293D,7805

2. IR transmitter, IR receiver

3. Variable resister

Technical skill

Programing Language known - Verilog, VHDL, C

Tool known - Mentor Graphics ModelSim, Precision synthesis RTL plus, Xmanager, Xilinx ISE Certification & Training

VHDL 4week SUMMER TRAINING at CETPA INFOTECH PVT. LTD. Lucknow

DIGITAL AND ANALOG ELECTRONICS ROBOTICS two week training at LABS GURU Lucknow Personal details

Name : Sarvesh Kumar Maurya

Father's name : Shri Shiv Bhola Maurya

Date of Birth : 27th August 1994

Nationality : Indian

Gender : male

Marital Status : Unmarried

Language Spoken : Hindi, English

Hobbies : Internet surfing, playing chess

Address : Village & Post-Lawana Dist. - Pratapgarh (U.P.) -230141 Deceleration

I Sarvesh Kumar Maurya hereby declare that the above information is true to the best of my knowledge.

Date: SARVESH KUMAR MAURYA

Place: Bangalore

Contact this candidate