CURRICULUM VITAE BLESSON MATHEW

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PERSONAL INFORMATION BLESSON MATHEW

Peedikayil Blesson Bhavan Kudassanad P.O 689512,Alappuha (D), Kerala

+91-479******* +91-828*******, 980-***-****

acsblh@r.postjobfree.com

Gender : Male

Date of birth : 11/10/1990

Nationality : Indian

Passport No : K8012892

Driving Licence no : 31/3502/2009

CARRER OBJECTIVE Seeking a challenging position in professional development with a technology related institutions and offering continuous growth opportunities. WORK EXPERIENCE

EDUCATION CHRONICLE

TRAINING

01/08/2014 – 30/04/2015 Teaching Assistantship (Part of GATE ) College of Engineering Munnar

Assisted in Communication Lab

Assisted in Seminar supervision

Assisted in Cadence lab

01/07/2012 – 30/08/2012 Lecturer

AMET Polytechnic College, Adoor

Lecturer in Electronics

Assisted in conducting AMET day

2013 -2015

M. Tech in VLSI & Embedded Systems

College of Engineering Munnar

8.2 GPA till 2nd semester (result awaiting)

Affiliated to CUSAT university

2008 – 2008 B. Tech in Electronics and Communication Mount Zion College of Engineering, Pathanamthitta

Awarded first class with distinction (76%)

Affiliated to Mahatma Gandhi University

2006 – 2008 Plus two (PCM Biology Science)

Pope Pius XI HSS Bharanickavu

Awarded distinction (92%)

Kerala state HSE Board

2006 SSLC

Pope Pius XI HSS Bharanickavu

Awarded distinction (92%)

Kerala state board

3 days Analog and Digital Design and Layout

Entuple Technologies, Bangalore

01/01/2012 – 30/01/2012

Optical Fiber Communication Training

Regional Telecom Training centre BSNL, Trivandrum CURRICULUM VITAE BLESSON MATHEW

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SKILLS

PROJECTS

Programming skills

C, C++, OOP

Basic knowledge in VHDL, Verilog, Micro C, Embedded C Technical skills CAD-Tools Used

Cadence Virtuoso, Encounter

Xilinx ISE

MATLAB

MPLAB-IDE

Gain master

MULTISIM

Knowledge of Compilers : Keil, diligent ALYTS kit

Knowledge of creating an embedded system

OS - Ubuntu, Windows ( 20xx, XP,Vista,7,8), Android Communication skills

Good communication skills

Debating skill: Gained through academics

Excellent convincing power: Gained through social activities Extra-curricular activities Executive Member of the college senate

Volunteered “ Microsoft Dream Spark Yathra” Technical Workshop in 2011

Volunteer of Sunday school service

Participant of various cultural- technical fests Achievements Awarded GATE scholarship

Awarded Central Sector scholarship

Got best Seminar presenter award in B. Tech

Won prizes in drawing, story writing and SAT exam Area of Interests VLSI Design Modelling and Simulation, Embedded System Design, Microelectronic Devices, Digital System Design, Low Power IC Design, Embedded Linux Systems, Electronics, Mathematics

Papers Presented Paper entitled ‘’Comparison of Low Power DPTAAL Full adder in 180nm and 45 nm” in National Conference on Emerging Trends in VLSI & Embedded systems, Optoelectronics & signal processing held at Govt. Model Engineering College, Thrikkakara sponsored by IEEE explore

Project 1 (M. Tech)

Title: Design and analysis of low power DPTAAL full adder in 45 nm and its implementation in an ALU.

Organization: College of Engineering Munnar.

Guided By: Mr Abdul Salam K.K, Assistant Professor, Department of Electronics and Communication Engineering, College of Engineering Munnar, Kerala Description: low power is a censorious constrain in modern VLSI design. Components in multipliers and processors requires low power dissipation. The application of low power DPTAAL logic results in a low power operation. Full adder enhances the performance of processors. Simulation results in the Cadence Virtuoso tool shows a satisfactory results. Its application in ALU further results in a low power operation.

Platform: Cadence Virtuoso, Encounter, Analog design environments. Project 2 (M. Tech)

Title: Design and implementation of Wallace tree multiplier in VHDL. Organization : College of Engineering Munnar

Guided By: Mr Jayakrishnan, Assistant Professor, Department of Electronics and Communication Engineering, College of Engineering Munnar, Kerala Description: The arithmetic circuits in digital system consist of basic building blocks of registers, multiplier and adders. This adder implementation mainly targeted on area and power optimization. It adds the partial products in parallel in tree like fashion. Which in turn reduce the run time and resources.

Platform: VHDL, Xilinx 14.1

CURRICULUM VITAE BLESSON MATHEW

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SEMINARS PRESENTED

REFERENCES

Mr K. K. Abdul Salam

Assistant Professor, Dept. of ECE

College of Engineering Munnar, Kerala

acsblh@r.postjobfree.com

+91-944*******

Mr. Jayakrishnan K. R

Assistant Professor, Dept. of ECE

College of Engineering Munnar, Kerala

acsblh@r.postjobfree.com

+91-944*******

DECLARATION

ANNEXES

Project 3 (B. Tech Title: Gain optimization of EDFA in long haul optical fiber communication Organization: Regional Telecom Training centre, BSNL, Trivandrum. Description: The project is to analyse the paradigms of an Erbium Doped Fiber Amplifier in the optical fiber communication. The stabilization of gain of the amplifier is a critical parameter. The gain of the EDFA amplifier is optimized by the supply voltage, method of splicing, length of fiber. From the analysis satisfactory results are obtained for the gain without any information loss. Platform: Gain master, multisim

Project 4 (B. Tech) Title: Modified version of fire safety system FIRE SHIELD Organization: Mount Zion College of Engineering, Pathanamthitta. Description: This is a mini project, which is a modified version of fire safety system.it includes alternate power supply system, alternate lighting system, and emergency exit. Platform: PIC 16F86 microcontroller, PIC compiler, Embedded C.

Design and optimization of Low Power DPTAAL Multiplier.

Launch and capture power reduction in launch-off-shift and launch-off-capture testing

Fast Route: An efficient and high quality global Router

Modifications of Dijkstra’ s Algorithm.

Small Antennas Based on CRLH Structures: Concept, Design, and Applications

Digital and Analog world of Electronics

I assure that the information furnished above are true, complete & correct to the best of my knowledge. BLESSON MATHEW

Copies of degrees and qualifications;

Covering Letter.

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