Engineer Customer Service

RENE ZUNIGA-ORTIZ

E-Mail: ************@*****.***

https://www.linkedin.com/in/renezunigaortiz

SUMMARY

A detail-oriented and analytical engineer, with demonstrated expertise in failure and yield analysis, yield ramp-ups, Web design, device laboratory characterization, and silicon and package qualification. Established capabilities in process technology, production off-loads, debugs, compliance, customer service, and problem-solving and troubleshooting. Leads projects from concept to planning, proposals, vendor selection and implementation. Develops and oversees tools to collect data and enable collaboration between departments and partners. Master in Data Analysis by systematically applying statistical and/or logical techniques to describe, condense, evaluate and report data. Driven to achieve results and exceed expectations to ensure an organization’s sustained success.

EXPERIENCE

TEXAS INSTRUMENTS, Dallas, Texas

Team Lead, Product Engineer, Custom Business Unit, 2006-2015

Managed team of engineers for different ASIC product lines, including Cisco, Ericsson and Huawei. Provided end-to-end support for custom chip designs, including participation in quote reviews, design kickoffs and design for testability meetings. Utilized late technology designed into ASIC chips to generate test methods and provide customer support in debug and characterization.

Drove new test methodologies for yield improvement and test time reduction while designing ATE test hardware for Probe (Wafer) and Final (Package) test.

Spearheaded execution of device and package qualification across different assembly sites and wafer fabs.

Implemented new devices from design to characterization to qualification to release to production.

Conducted customer return debug and analysis, and drove corrective actions to achieve customer satisfaction.

Master in Data Analysis by systematically applying statistical and/or logical techniques to describe, condense, evaluate and report data.

Technology Transfer Team Product Engineer, 2002-2006

Oversaw technology transfer of C035 and C027 process in DM6 and foundries wafer FAB while coordinating and assisting in all product engineering activities toward full process technology and device qualification. Supported training for activities in areas of parametric, FA, laser repair, SRAM and multi-probe test, and data analysis.

Involved in process and device marginalities, and worked with process integration and product development PDE, LBEs and assembly sites for completion of new process technology and device qualification.

Led LBE PDE and QRA and FAB’s regular meetings on C027 DRP products to understand and close any gaps for yield and volume ramp of devices.

Managed cross-functional teams, including design, PI, PDE and FAB, for development of wafer-level RF process monitoring and parametric testing for digital RF processors.

ADDITIONAL EXPERIENCE

Product Engineer Manager, 1999-2002. Led company and Ardentec (Subcom) product and test engineering. Oversaw and scheduled TI-Ardentec test floor and test capability setup. Directed TI and foundry product engineers to debug technology process problems and assist in electrical data analysis for fast production ramp on C035.1 process technology. Coordinated and managed C035.1 qualification and UPP 8Meg production ramp-up.

Product Engineer Manager - ANAM Wafer FAB Project, South Korea, 1997-1999. Coordinated installation, support and training for test and yield-enhancement tools as well as company’s strategic testers, including Polaris, VLCs, V-series, HP parametric testers and FA equipment. Heavily involved in the Qualification of C10/C07 Device Process Technologies.

Yield, Volume Ramp Team Leader, Product Engineer, 1986-1997. Identified and resolved constraints to high-volume production in advance microprocessor devices. Supported wafer FAB requirements for ESDA memory test and FA implementation. Developed navigation database generation flow for FIB and EBEAM tools (used for prototype and production debug and failure analysis).

Test Engineer, El Salvador, Malaysia, 1984-1986.

EDUCATION

UNIVERSITY OF TEXAS AT DALLAS, Plano, Texas

MS in Electrical Engineering, Major in Microelectronics, 1993

UNIVERSITY OF CENTRAL AMERICA, San Salvador, El Salvador

BS in Electrical Engineering, Minor in Computer Science, 1984

RELEVANT COURSEWORK

Quality: Statistical process Control 1&2

Design for 6 Sigma

ISO 9001

Technical: Author of papers on Yield/Quality and Volume Ramp up

Production RF test Monitors for DRP Products

Inline SPC Process parameters vs. Parametric and Multiprobe Test

Test/Charc: HSM, VLCT, POLARIS

HP/Keithley (Wafer Level Parametric Testing)

Bench Equipment: Oscilloscopes, Data & Function Generators, Labview, etc

Data Analysis: Spotfire, Sql, SAS, Jump, Excel, Access, google analytics

Software Skills: Microsoft Office Suite, C++, Javascript, html/css, Wordpress

COMMUNITY INVOLVEMENT

Chairman of the Hispanic Community Involvement for 3 years.

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