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Engineering Power

Location:
Dadri, UP, 203207, India
Posted:
January 17, 2016

Contact this candidate

Resume:

Sethu Raman S

Address: ***-*, *-*****, ************ Apts., NOIDA-53, U.P.

Phone: +91-995*******

Email: acs42x@r.postjobfree.com

DOB: 06.01.1995

Objective

Intern in VLSI design based projects.

Education

Qualification

School/College

University

/Board

Year

Stream/ Degree

Percentage

Undergraduate

Shiv Nadar University, Greater NOIDA

Shiv Nadar University

2012-present

B.Tech, Electronics and Communication Engineering

6.2 cgpa

Class 12

SRV Matric. Higher Sec. School, Rasipuram

Tamil Nadu State Board

2012

Biology, PCM

92.3

Class 10

Kendriya Vidyalaya Ashok Nagar, Chennai

CBSE

2010

9.2 gpa

Projects

Semester

Project Title

Duration

Technology Used

Description

VI

Signal Band Power Extractor on Body sensor node

5 months

Software used: MATLAB

A MATLAB code was written to implement the FIR filters and SPC(Signal Power Circuit) used in the Block Diagram to extract the power from the bands, it was based on a IEEE paper.

VI

Feature Vector Extraction for a chronic seizure detection

5 months

FPGA

Languages and Software used: Verilog, MATLAB

A Verilog design using gates and logic is designed for extracting the feature vector for detection of chronic seizures. And then is it synthesized and implemented in FPGA for a working project model.

V

Parking lot System

3 months

8051 Microprocessor,

Language and

Software used: Embedded C and Keilµ51Vision

A logical code for parking lot problem was written which was used by the microprocessor for issuing the token and collecting the parking charge for the time the vehicle is parked for and it also shows the number of free spaces left in the parking lot.

IV

Fire alarm

3 months

IC 555 Timer and Basic gates

A simple circuit connection made on a breadboard using passive and active components which has an IR sensor for detecting fire and a buzzer for alarm.

Internships and Positions Held

Title of Position

Organization/Institute

Duration

Description

Intern

Rural Electrification Corporation LIMITED.

2013

June – July

A brief knowledge on Generation of Electricity by Power Plants was gained and also their Transmission and Distribution part was analyzed.

AURA Member

Shiv Nadar University

2013-14

AURA is a nonprofit educational society where students from all disciplines come together and contribute their bit in thriving the overall development of the overlooked students in the areas close to the campus.

Skills

Communication : Well versed with Hindi, English and Tamil

Technical : Have studied VHDL, Verilog and C (languages)

wxMaxima - in Mathematics

MATLAB - in Digital Signal Processing and Mathematics

LTspice - in Analog Electrical Circuits and EE

FEM - in Electromagnetics

Keilµ51Vision – in Microprocessor/Microcontroller

LSIM - in Communication Systems

Xilinx ISE - in FPGA

Interests

Playing Chess and Football

Movie freak

Declaration

I consider myself familiar with Electronics and Communication Engineering concepts. I am also confident of my ability to work in a team.

I hereby declare that the information furnished above is true to the best of my knowledge.

Sethu Raman S



Contact this candidate