B.E

Sowmiya.r b.e

*/**, ******* ****(st), email:acrxx3@r.postjobfree.com Ramadevanallur(vill),Meensurutty(post),

Contact :915*******,967-***-**** Udaiyarpalayam(T.K), Ariyalur(D.T),

Pin:612903.

CAREER OBJECTIVE:

Willing to work in a challenging environment where I can work with latest technology,

learning, implementation, team work.

ACADEMIC SUMMERY:

B.E(Electronics and Communication Engineering) from VRS College of Engineering Technology, Arasur in the year of 2015 with 7.53 CGPA.

HSC from Government Girls Higher Secondary School, Meensurutty in the year of 2010 with 80.17%.

SSLC from Government Girls Higher Secondary School, Meensurutty in the year of 2008 with 86.2%.

KEY SKILLS:

TECHNICAL:

Basics for c language.

Basics for VHDL coding and VLSI coding .

Microsoft word, Microsoft power point and Net browsing.

NON TECHNICAL:

Ability to good drawing.

Honest,hardworking,positive attitude and willingness to learn.

Ability to cope up with different situations.

CERTIFICATIONS:

Certified in VLSI applications in industries by NSIC,Chennai.

CO-CURRICULAR ACTIVITIES:

Participated in security hijacking workshop conducted by VRSCET.

Attended one week industrial training at NSIC, Chennai.

Attended symposium conducted by VRSCET.

Presented a paper on “ video based detection and analysis of driver distraction and inattention” in the ISTE conference conducted by Erode Sengundhar engineering college, Erode.

Participated mini project computation on “Micro controller based programmable security door lock” in VRSCET, Arasur.

ACADEMIC PROJECT WORK:

Academic project on “Quaternary CMOS gates for the synthesis of multiple valued logic digital circuits” .

By increasing the domain of the digital representation to levels, it is possible to design MVL (Multiple Valued Logic) circuits. The subject of MVL is also known as multiple-valued, multi-valued or many-valued logic.The proposed methodology in this work is based on a universal set of gates, that implements operators acting on the elements of domain .MVL logic used for to reduce inter connections between digital circuits.

PERSONAL DETAILS:

Date of birth : 09-06-1994.

Father’s name : Mr.V.Rajendran.

Sex/marital status : Female/married.

Hobbies : Gardening, Listening music, browsing net.

Language skills : English, Tamil (Speaking, Writing &Reading).

DECLARATION

I do hereby declare that all the above said details of information and facts are true to my knowledge.

Thanking you,

Place : Yours faithfully,

Date : (SOWMIYA.R)

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