Project Design

Arpita Saha Specialization: M.Tech VLSI Design

Address: Nissi Pg, Bellandur Contact No: +91-973*******-**/1, Outer Ring Road, Near Hotel +91-773******* Rasa Ganga, Bellandur E-mail id: *********@*****.*** Bangalore (560103), Karnataka

OBJECTIVE

To work in an esteemed organization where I could give my best through my Technical & Solution Oriented Approach & work for the betterment of the organization & thus facilitates my own growth. ACADEMIC PROFILE

M.Tech in VLSI Design from Banasthali University, Rajasthan in 2015; 80.07%.

B.Tech in Electronics and Communication Engineering from Rajasthan Technical University in 2013; 74.15%

12th from RBSE, Ajmer in 2009; 82.31%

10th from RBSE,Ajmer in 2007; 82.83%

TRAINING ATTENDED

1 year Research Project Training on VLSI Design. From: July 2014 to April 2015, Malaviya National Institute of Technology, Jaipur

1 Month training on FPGA using VHDL. From: May 2012 to June 2012, Defence Research and Development Organisation, Delhi

TOOLS & LANGUAGE SKILLS

Tools: HSPICE, CosmosScope, Xilinx ISE, ModelSim, Cadence, Leonardo Spectrum.

Hardware Description Language: Verilog HDL, VHDL.

Programming Languages: C concepts.

Scripting Languages: PERL

PROJECT DETAILS

Postgraduate Projects (M.Tech) :

1. Title: Calculation of Performance parameters of 6T SRAM at architectural level From: Malaviya National Institute of Technology

Description: In this project different 6T SRAM arrays has been simulated with all its peripheral circuitry. Different performance parameters like SNM, Delay, Power Dissipation is also estimated in this project. Duration: July’14 – April’15.

Tools: HSPICE, CosmosScope

2. Title: Delay optimization in digital circuits using GDI. From: Banasthali Vidyapith

Description: In this project a gate diffusion input technique is used to achieve delay optimization by minimizing the number of gates.

Duration: July’13- April’14.

Tool: CADENCE

Undergraduate Project (B.Tech) :

1. Title: Gate Security system using password

Duration: 3 Months

Tool Used: 8051 Microcontroller

2. Title: Automatic Plant Irrigator

Tool Used: 8051 Microcontroller

CONFERENCE

“Delay Optimization in Digital Circuits using GDI”, National Conference on Innovations in Microelectronics, Signal Processing and Communications technologies, Jaipur PUBLICATIONS

“A Review on Advanced CMOS Structure: SOI”, International Journal of Semiconductor Science and Technology (ISSN: 0975-6493)

“Gate Diffusion Input: A technology for fast Digital circuits (Implemented on 180nm Technology)”, International Organization of Scientific Research Community of Researcher (ISSN: 2319-4197) EXTRA-CURRICULAR ACTIVITIES

1. Two days workshop on VLSI Circuit Design & Layout Simulation. From: 23rd & 24th Feb, 2014, Xinoe System, Noida.

2. Three days workshop on 3-D Animation in MNIT, Jaipur. From: 23rd Oct to 24th Oct, 2010, i3indya Technologies. 3. Achieved Gold medal in karate and green belt in karate also. 4. Played district level volleyball and got many prizes at school and college level. PERSONAL INFORMATION

Date of Birth : 01 July 1992.

Permanent Address : 8/179,Mukta Prasad Nagar, Bikaner (334004), Rajasthan Languages Known : English, Hindi and Bengali.

Personal Interests and Hobbies : Sports, reading, singing, Listening music DECLARATION

I hereby declare that the above furnished information is true and complete to the best of my knowledge. Arpita Saha

Contact this candidate