ME-VLSI DESIDN

JAYACHITHRA P

*/**-*, **** ******,

Solaiseri,

Reddiapatti (Po),

Thirunelvelli (Dt) – 625540

Mobile No: +91-968*******

E-mail id: acqn9g@r.postjobfree.com

OBJECTIVE

To serve in a progressive organization, that will provide me exciting opportunities to learn more and utilize my skills for the development of the organization and my professional growth.

ACADEMIC PROFICIENCY

Course

Institution

Board /

University

Year of

Completion

Marks / CGPA

M.E

(VLSI Design)

Kalasalingam Institute of Technology

Anna University,

Chennai

2015

7.464*

B.E

(Electronics and Communication Engineering)

P. S. R. Rengasamy College of Engineering for Women

Anna University,

Chennai

2013

8.082

HSC

Sri Rao Bahadhur AKDD GHSS

State Board of Examination,

Tamil Nadu

2009

79.16%

SSLC

RVT Memorial GHSS

State Board of Examination, Tamil Nadu

2007

89.2%

(* Up to 3rd semester)

SOFTWARE & PROGRAMMING SKILLS

Front End: Xilinx ISE, ModelSim

Back End: Micro wind, Tanner, Cadence

Hardware: FPGA, 8085 Microprocessor

Programming Languages: VHDL, VERILOG HDL, C, C++, Basics of C#.

FIELD OF INTERESTS

Digital Electronics

Low Power VLSI Design

PROJECT EXPERIENCES

PG PROJECT: Design and Analysis of Low Power High Performance Single bit Full Adder.

UG PROJECT: Hardware Based NIDS using Counting Bloom Filter.

MINI PROJECT: Remote Control Fan Regulator.

INTERNATIONAL / NATIONAL CONFERENCES

Presented a paper in 2nd international conference on trends in technology and engineering (ICTTE’15) entitled “Design and Analysis of Low Power High Performance Single Bit Full Adder” on 17th April 2015 at Arjun College of Technology, Coimbatore.

Presented a paper in 3rd International Conference on Design and Application of Structure, Drives, Communication and Computing Systems (ICDASDC-2014) entitled “Design and Analysis of Low power High speed 10T Full Adder” on 19th and 20th December 2014 at K.L.N. College of Information Technology, Sivagangai.

Presented a paper in 5th National Conference on System Design and Information Processing (SDIP-14) entitled “Data Hiding in JPEG Image using Steganography Technique,” on 21th March 2014 at PSNA College of Engineering and Technology, Dindigul.

Presented a paper in 6th National Conference on signal, systems and security (NCSSS-2014) entitled “Delay Fault Coverage with Gate Clock by Partial Clocking for Low Power Design,” on 28th February 2014 at Bannari Amman Institute of Technology, Sathyamangalam.

Presented a Paper in 1st International Conference on Interdisciplinary Engineering and Sustainable Management Sciences (ICIESMS-13) entitled “Counting Bloom Filter Based NIDS,” on 23rd February 2013 at Vickram College of Engineering, Sivagangai.

JOURNAL PUBLICATIONS

Published the paper titled “Design and Analysis of Low Power High Performance single Bit Full Adder” in International Journal for Trends in Engineering and Technology(IJTET), Volume 5, Issue 1, May 2015, pp. 61-64.

Published the paper titled “Implementation of Fixed-Point LMs Adaptive Filter using Computation Blocks” in International Journal of Digital Communication and Networks (IJDCN), Volume 3, March 2015, pp. 21-23.

SEMINARS/WORKSHOPS ATTENDED

Attended a National level workshop on “Analog and Digital System Design Using Cadence EDA Tool” during the period from 29th to 30th January 2015 at Bannari Amman Institute of Technology, Sathyamangalam.

Attended a National level workshop on “Embedded System” at Mepco Schlenk Engineering College, Sivakasi held on 19th February 2014.

Participated a National level workshop on “VHDL Programming and Practice” at Bannari Amman Institute of Technology, Sathyamangalam, held on 7th to 8th February 2014.

INPLANT TRAINING

Undergone In Plant training on “Tuticorin Thermal Power Station”, during the period from 11st to 15th July 2012, at Tuticorin.

Undergone In Plant training on “Southern Railway – Madurai Division”, from 6th to 18th May 2011, at Madurai.

PERSONAL DETAILS

Mother’s name : Mrs. P. TAMILSELVI

Father’s name : Mr. S. PARTHASARATHY

Date of Birth : 31st May 1992

Gender : Female

Marital Status : Unmarried

Nationality : Indian

Hobbies : Reading books, Hearing music

Languages : English (R-W-S), Tamil (R-W-S)

DECLARATION

I hereby declare that the above mentioned particulars are true to the best of my knowledge and belief.

PLACE: Thirunelveli

DATE: (JAYACHITHRA P)

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