VLSI engineer with good knowledge of digital systems

CURRICULUM VITAE

AFSHAN FATHIMA

E-Mail: *********@*****.*** Cell: +91-903*******

CAREER OBJECTIVE:

To obtain a challenging VLSI Engineer position which will enable me to utilize the knowledge and skills I have acquired through out my education. To associate myself and contribute as a professional with the organization, which has potential for both organizational and industrial development, personal growth and which provide greater scope to learn improvise and implement

Educational Qualification:

Name of the Degree

Duration of the Course

Specialization

Institution Name

Affiliation

Percentage Obtained

(M.Tech)

2012-2014

VLSI Design

Nizam Institute of Engg and Tech; Hyderabad(N.I.E.T)

JNTU-H

79%

B.Tech

2008-2012

ECE

Nizam Institute of Engg and Tech; Hyderabad(N.I.E.T)

JNTU-H

70.24%

10+2

2006-2008

M.P.C

Sri Chaitanya Junior College, Hyderabad

Board of Intermediate

71.3%

S.S.C

2004-2006

English Medium

Raghunatha Model High School,Hyderabad

Board of Secondary Education

79%

EXTRA QUALIFICATION:

Certificate course in C and C++ LANGUAGES

Certificate course in CORE and ADVANCED JAVA

Certificate course in J2EE

Academic Projects:

TITLE : GPS-GSM CONTROLLED ROBOTIC ACTIVITY

Description:

The main objective of the project is to show the working model of the mass rover robots and their operation. The functions performed are controlling the robotic activity using GSM technology. here we give the instructions to the robot for its operations from a fixed reference number which is programmed to it. We are using GPS to find the position of the robot at the location it is present.

TITLE : LEAST COMPLEX S-BOX AND ITS FAULT DETECTION

Description:

The fault detection scheme for their hardware implementation plays an important role in making the AES robust to the internal and malicious faults. In the proposed AES, a composite field S-Box and inverse S-Box is implemented using logic gates and divided them into five blocks. The main objective of this project is to show various software applications of AES algorithm and AES implementations on an Field Programmable Gate Array (FPGA), a 128-bit AES encryption and decryption using Rijndael Algorithm is designed and synthesized using verilog code. This process of solving the s-box using the Rijndeal algorithm helps us in high level of security.

COMPUTER SKILLS:

MS-OFFICE, all Operating System software’s & Internet applications.

EXTRA CURRICULAR ACTIVITIES:

Event organizer in all school and college annual day and other technical events.

STRENGTHS:

Adaptability.

Ability to work with people diplomatically.

Thrive on working in a challenging environment.

PERSONAL DETAILS:

Name : AFSHAN FATHIMA

Father’s Name : MOHAMMED ABDUL RAHMAN

Date of Birth : 12-07-1991

Religion : MUSLIM

Nationality : INDIAN

Languages Known : ENGLISH; TELUGU; HINDI

Permanent Address : H.No-1-5-898,Near jain mandir, Maruthinagar, Chaitanyapuri Hyderabad, 500036

.

Hobbies : LISTENING TO MUSIC, PLAYING GAMES.

Expected Salary : As per company norms.

DECLARATION:

I hereby declare that the above information is true and if given a chance, I will do the best of my efforts as a team member in achieving the goal of the organization.

AFSHAN FATHIMA

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