M Shiva Kumar
MOBILE
+91-953*******, +91-990*******
Home Landline/M
Citizenship: INDIAN
DOB:08-03-1992
Gender: Male
**************@*****.***
Present Address
M Shiva Kumar, C/o Hussein Sheik, Beside of Blossom, Durga temple road, Indrali, Udupi-576102
Permanent Address
H no 4-17, Near Huligamma Temple, Vill- Kunsi, Mdl- Maganoor, Dist.: Mahaboobnagar, TG-509352
Objective
To seek a challenging environment that encourages continuous and research oriented approach of learning
Educational Qualifications
Grade
School / College
Board / University
Duration
% / CGPA
10th
ZPP High School Kunsi
APSSC
2006-2007
78.5
Diploma
Government Polytechnic college Mahaboobnagar
SBTET-AP
2007-2010
71.65
B.E
Vidyajyothi Institute Of Technology
Jawaharlal Nehru Technological University, Hyderabad, AP
2010-2013
83.20
M. Tech
Manipal Institute of Technology
Manipal University
2014-till date
7.07
Branch of Engineering
Electrical and Electronics Engineering
Year 1
Sem 2-1
Sem 2-2
Sem 3-1
Sem 3-2
Sem 4-1
Sem 4-2
GPA / %
NA
86.27
80.4
86.27
80.4
76
80.85
M. Tech Branch : Digital Electronics and Advanced Communication CGPA :7.07
Elective Subjects
VLSI Physical Design And Verification, VLSI Testing And Testability, Embedded System Design
Areas of Interest
Digital Design, Analog design, VLSI physical Design, Embedded systems
Skill Sets
Languages
C, Verilog HDL
Tools
Cadence Virtuoso (Schematic and Layout), modelsim, Xilinx
Operating System
Windows 7,8
Technical Activities
M.Tech mini project: Study Of CMOS Class-AB Pseudo Differential Amplifier using Cadence Virtuoso tool (180nm technology).
B.E project : Multi Level Elevator and Its Applications
Role : Team Leader
Paper presentation on “Multi-MOSFET Based Series Resonant Inverter For Improved Efficiency and Power density Induction Heating
Applications” in M.tech 1st semester
Designed schematic and layout of Self Biased differential amplifier using Cadence Virtuoso tool
Designed Linear Feedback shif register (LFSR) using Verilog.
Additional Activities
Participated in Quiz-E-Jung, VERVE’11 National Level Tech Fest Held at VJIT
Participated in college cricket tournament
Achievements
Secured 1st rank in 2-1 and 3-1 Semesters of B.Tech.
Secured college 5th rank in B.Tech
GATE-2014 QUALIFIED with 94.56 percentile
Secured mandal Third rank in SSC.
References
1. Dr.Somshekar Bhat Professor and H.O.D (ECE Dept.), MIT, Manipal, Mobile: +91-996******* email: ****.****@*******.***
2. Dr.M.Sathish Kumar Professor of M.Tech (ECE Dept.), MIT, Manipal. Mobile: +91-948******* email:*******.*****@*******.***
The above information provided by me is true and have all the relevant documents to authenticate the same.
M Shiva Kumar