Project Manager

RESUME

MUDASAR BASHA

Email: *********@*****.***

Contact No: +91-991*******

Objective:

To give the best out of my skills, utilize my Potentials to the fullest and strive for my professional Recognition which would contribute and enhance the growth of the organization.

Work Experience Total 4 Years as on 10/08/2015

August 2013 to till date (2 Years)

Position : Project and VLSI Design Trainee Engineer

Company : Somarouthu Technologies, Secunderabad .

Project : SEGWAY Implementation

August-2011 to July -2013 (2 Years)

Position : Project Engineer

Company : Leads Technologies, Kurnool. .

Project : SEGWAY Implementation

Roles and Responsibilities:

1. Planning:

Reviews all preliminary reports including advance planning studies for the project

Prepare schedule, coordinate and monitor the assigned engineering projects.

Monitor compliance to applicable codes, practices on performance standards and specifications.

2. Coordination:

Coordinates structural details and design features within the project. Conducts meetings with designers and detailers as required.

Interact daily with the clients to interpret their needs and requirements and represent them in the field.

Perform overall quality control of the work (budget, schedule, plans, personnel’s performance) and report regularly on project status.

3. Project Control:

Reviews General Plan estimates.

Keeps record of Project Plan print distribution.

Assign responsibilities and mentor project team.

4. Communication:

Maintains continual communications with all personnel assigned to the project.

Cooperate and communicate effectively with project manager and other project. participants to provide assistance and technical support.

5. Trainee:

Defines the training situation.

Introduces adequate Trainee methods.

Adapts the Training Program to trainee needs.

Designs Training Manuals and materials.

Delivers the train the trainee Workshops.

Presents the Subject.

Take care of training and training resources.

Activates the Process of sharing experiences.

Project 1:

Presently Working on the Project called “SEGWAY IMPLEMENTATION”.

Abstract: The segway is the first transportation product to stand, balance, and move in the same way we do. It is a truly 21st-century idea. The aim of this research is to study the theory behind building segway vehicles based on the stabilization of an inverted pendulum. An experimental model has been designed and implemented through this study. The model has been tested for its balance by running a Proportional Derivative (PD) algorithm on a microprocessor chip. The model has been identified in order to serve as an educational experimental platform for segways.

Project Duration: 6 months.

Team Size: 3 Members.

Project 2:

WIRELESS BASED HEART BEAT MONITORING OF MULTIPLE PATIENTS

Technology is being used everywhere in our daily life to full fill our requirements by using different sensors for different applications.

One of the ideal ways of using technology is to employ it to sense serious health problems so that efficient medical services can be provided to the patient in correct time.

By using this wireless heartbeat monitoring system doctor can approach patients quickly and can give the treatment when it is needed and can save the patient life.

Application: Medical Analysis.

Project 3:

DESIGN AND ANALYSIS OF SEQUENTIAL CIRCUITS USING DOUBLE EDGE TRIGGERED (DET) FLIP FLOP

A conventional positive-edge-triggered flip-flop (FF) senses and responds to the control input or inputs at the time the clock input is changing from 0 to 1. It does not respond at all to changes in the opposite direction.

Double- edge-triggered (DET) FF's responding to both edges of the clock pulse would have advantages with respect to speed and energy dissipation.

The main advantage of using DETFF is that it allows one to maintain a constant throughput while operating at only half the clock frequency.

Project 4:

CMOS FULL ADDERS FOR ENERGY EFFICIENT ARITHMETIC APPLICATIONS.

Energy efficiency is one of the most required features for modern electronic systems designed for high-performance and/or portable applications

The power-delay product (PDP) metric relates the amount of energy spent during the realization of a determined task, and stands as the more fair performance metric when comparing optimizations of a module designed and tested using different technologies, operating frequencies, and scenarios.

Applications:

Digital signal processors (DSP) architectures and Microprocessor.

Cellular phones, PDA’s, and laptop computers require the use of power efficient VLSI circuits.

Project 5:

DESIGN OF MULTILANE PCI EXPRESS (PHYSICAL LAYER TRANSMITS PROTOCOL).

Literature Survey to understand 3G high performance I/O bus used to interconnect peripheral devices.

Prepared Detailed Design Document For PCI Xpress.

Advantages: High Performance, I/O Simplification, Layered Architecture, next generation I/O, Ease of use.

Applications: notebook, desktop, or server. Servers, which require larger bandwidths to service I/O requirements.

Educational Qualifications:

M-Tech in VLSI Design from Jawaharlal Nehru Technology, Anantapur 2009-2011 with Distinction.

B-Tech From Safa College of Engineering and Technology 2004-2008 with First Class

Intermediate from Board of intermediate with 80.8%

SSC from Board of Secondary Education with 79.8%

Soft Skills:

Hardworking With Positive Attitude.

Adjust to the new Environment and Situations.

Eager to know new technologies and new things.

Hardware Design using Verilog coding.

Verification using Verilog & System Verilog.

Good Understanding in ASIC Flow.

Key Strengths:

Strong Interest and enthusiasm in development and design of Organization.

Ability to take complete accountability and responsibility for any task assigned to me and

completes it on time with hard work and sincerity.

Continuous learner from every available source, books, Articles, internet and people.

Technical Skills:

A Diploma course in an ASIC/FPGA Design for duration of 6 months in Vector Institute, Hyderabad.

Languages: C, C++, Perl.

Operating Systems: Windows XP, Linux.

TOOLS KNOW:

Tools for FPGA:

Simulation: Modelsim(Mentor Graphics),Active HDL(Aldec)

Synthesis: Leonardo (Mentor Graphics)

Place & Route: Xilinx ISE Project Navigator, Altera

Tools for ASIC:

Simulation: Modelsim(Mentor Graphics),Active HDL(Aldec)

Synthesis: Design Compiler (Synopsys)

ATPG: TestKompress (Mentor Graphics)

Tools for DFT:

DFT Advisor (Mentor Graphics).

Tools for Physical Design:

Digital Schematic and Micro wind Simulation: Modelsim, Questa.

Area of Interest:

Circuit Designing and VLSI.

Programming in C, C++.

Achievements:

Wireless Based Heart Beat monitoring System was shortlisted for the Final Round of ATMEL Design contest Held in Pune.

Participated in a “NATIONAL LEVEL CONFERENCE” Organized by

“KALASALINGAM UNIVERSITY”, Tamil Nadu.

Participated in a “NATIONAL LEVEL CONFERENCE” Organized by Lords College Of Engineering and Technology, Hyderabad.

Hobbies:

Watching and Playing Cricket, Reading Technical related books and Articles.

Personal Details:

Name : Mudasar Basha

Fathers Name : Jani Basha

DOB : 24-04-1986

Sex : Male

Marital Status : Married

Nationality : Indian

Languages Know : English,Hindi,Telugu,Urdu

Declaration:

I here by declare that all the information mentioned above is true to the best of my Knowledge.

Date:

Place: Hyderabad (Mudasar Basha)

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