Thermal Power Design

PURVA CHOUDHARY

Mob: +91-905******* ****************@*****.***

Career Objective:

To pursue a career with a company having a global vision that will utilize and enhance my skill sets in the field of VLSI.

Profile Summary:

A self motivated, well organised person with an ability to analyse things and get creative solutions. A key player in challenging & creative environments with excellent capacity to adapt to new technologies, pursuing M.Tech in VLSI & Embedded Systems from JNTU, Hyderabad after finishing B.Tech in Electronics & Communication Engineering with Honours. I have sound knowledge of digital logic design and digital circuit design with exposure to design using HDL language, functional simulation and logic synthesis. I have gained good understanding of VLSI design flow and proficiency in EDA tools for design of ASIC, FPGA and system on chip.

I am actively seeking a challenging position where I can effectively contribute my skills and innovative ideas to gain knowledge and enhance my learnings with practical experiences.

Academic Profile:

M.Tech - VLSI & Embedded Systems, JTNU, Hyderabad. 77.6% .2015.

B.Tech. (Hons.) - Electronics & Communications Engineering, RTU, Rajasthan. 71.1%. 2012.

Senior Secondary - Rajasthan Board of Secondary Education, Rajasthan. 75.4%. 2007.

Secondary - Rajasthan Board of Secondary Education, Rajasthan. 88.7%. 2005.

Technical Proficiency:

VLSI Design:

SOC Encounter – Floor planning, Place& Route and Clock Tree Synthesis.

Encounter Timing System – Static Timing Analysis and Crosstalk Analysis.

RTL Compiler – Logic Synthesis.

Virtuoso – Standard Cell Design Layout.

Assura – Physical Verification.

HDL- Verilog and VHDL.

EDA Tools: Cadence, Tanner, Xilinx

Training Details:

October 2014 to January 2015 - Advanced Digital Design, MSME-CITD, Hyderabad.

September 2013 to March 2014 - Advanced Embedded Systems, Viven Embedded Academy, Hyderabad.

June 2011 to July 2011 - Thermal Power Generation, Kota Super Thermal Power Station, Kota.

October,2010 - Remote Sensing- GIS & GPS by ISRO.

Project Undertaken:

Architecture to detect and correct errors in motion estimation of video system based on RQ code: In this project we made the coding system efficient in error detection. The correction architecture is designed for detecting errors and recovering the data of the processing elements in a motion estimation using Xilinx tool.

Design of combinational circuits by cyclic combinational method for low power VLSI: The focus of this project was to analyze the functional timing of a cyclic combination circuit using standard simulator tool Assura and RTL compiler.

Modified SET D-flip flop design for low power VLSI: This project focused on modifying single edge triggered D-flip flop and tested it for various substrate bias voltages and finally compared it at 65nm and 45nm technologies using Virtuoso tool.

Digital Speedometer: It is used to measure speeds up to 999 kmph.

Digital Switching System: This system is used to control upto 16 output systems at a time by switching it on or off.

Seminars/Workshops:

Published paper titled ‘Architecture to Detect and Correct errors in Motion Estimation of video system based on RQ code’ at International Journal of emerging engineering Research and Technology,volume 3, Issue 7,july 2015

Published paper titled ‘Leakage Reduction Technique on SRAM cell’ at the National

Conference on Signal Processing, Communication and System Design [SPCOM-SD-2014], January, 2014.

Microsoft Dream Spark, JIET, April 2010.

PCB Designing, Department of ECE, JIET, October, 2010.

Strengths

Task oriented ability to work within a diverse team.

Proficient at grasping new technical concepts quickly.

Continuous learning and an innovative approach.

Adaptable and a quick learner; work well under pressure.

Good analytical skills and comprehensive problem solving ability.

Positive attitude and enthusiastic in teamwork.

Co-curricular Activities:

Academic Mentor, Mentorship Programme, JIET Girls Hostel.

Qualified GATE 2013.

Leisure Interests:

Listening music, reading novels, net –surfing, travelling.

Personal Profile:

Name : Purva Choudhary

Date of Birth : January 17, 1990

Marital Status : Unmarried

Languages Known : Hindi, English

Nationality : Indian

Permanent Address : Dr. Sumer Singh Khichar,Ward no 17,khetan colony,losal

Dist sikar,Rajasthan,332025

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