Design Project

SRINIVASU SONTHI

Email id: *************@*****.***

Mobile Number: 973-***-****

Career Objective:

I am seeking a challenging position with a progressive organization that

will allow me to exhibit my commitment to excellence in the field of

VLSI(ASIC Verification).

Core Competency:

Good knowledge of Digital Design Concepts.

Good knowledge of Verilog RTL coding.

Basic knowledge of ASIC flow.

Basic knowledge of UART protocol.

Good understanding of Object-oriented programming (OOP) concepts.

Skilled in HVLs such as SystemVerilog.

Good debugging skills.

Good understanding of MOS fundamentals.

working on the Mentor Graphics QuestaSim & ModelSim Simulation tools.

Basic knowledge of Linux and C programming.

Education :

Degree

Discipline

Institute

University

Year of Passing

Aggregate

Certificate courses

VLSI

RV-VLSI Design Center

2015

BE

Electronics & Communication

NRI Institute of Technology

2014

70.9 %

12th

MPC

Cherukupalli Junior College

2010

82 %

10th

Z.P.H SCHOOL

2008

85 %

Academic Projects:

Title: Verification of Synchronous FIFO,mini UART using

SystemVerilog.

Role: Developing test bench using System Verilog

Organization: RV-VLSI Design center

Duration of Project: 3 weeks

Description: Verified the functionality of SRAM,FIFO, mini UART

with maximum coverage using System Verilog by

performing regression tests.

Tools Used : Questa sim 10.2 (Mentor Graphics)

Challenges Faced: Finding out which value of the randomized input

field was not hit so as to fix the drop in the

functional coverage.

Title: Verification of Synchronous FIFO,mini UART using

UVM.

Role: Developing test bench for FIFO,mini UART in UVM

Organization: RV-VLSI Design center

Duration of Project 4 weeks

:

Description: Developed a test bench in UVM for verifying

FIFO,mini UART with maximum coverage and also made

a comparative study of the test benches written in

System Verilog and UVM for the same FIFO,mini UART

RTL.

Tools Used : Questa sim 10.2 (Mentor Graphics)

Meeting maximum functional coverage was a little

Deliverable/Challeng difficult in the beginning but was overcome

es Faced: finally.

Personal Profile:

Name

:Srinvasu S

Date of Birth

: 05/AUG/1993

Address

:2-165,Kasturivaripet,Cherukupalli(PO&MD),Guntur(DT),AP

Father Name

: Koteswara Rao S

Nationality

: India

Sex

: Male

Languages known

: English,Telugu

I hereby declare that all the information given above is good and true up

to my knowledge.

DATE :

PLACE : BANGALORE

SRINIVASU S

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