java developer

Sudharani Karunanidhi

Master of Engineering Graduate

*********.******@*****.*** Mobile: 484-***-****

To contribute outstanding technical expertise, problem solving abilities and leadership skills,

OBJECTIVE

blended with strong commitment to achieve the company’s goals as a Full Stack Engineer.

PROFILE • Extensive experience in building electrical and electronic parts, prototypes and system designs.

• Savvy in Java, JavaScript, JEE, C, C++, Verilog, VHDL, CAD.

• Hands on experience in using tools like Eclipse, Turbo C, XILINX, Matlab, OrCAD

P-SPICE, Model Sim

• Strong analytical, communication and interpersonal skills.

• Solid team building skills.

July 2013

Anna University, Tamil Nadu, India

EDUCATION

Master of Engineering in – VLSI Design (CGPA: 7.82)

May 2011

Anna University, Tamil Nadu, India

Bachelors in Electronics and Communication Engineering (Aggregate: 78%)

SKILLS Java, SQL, C, C++, Verilog, VHDL, CAD

Languages:

Turbo C, Eclipse IDE, XILINX, Matlab, OrCAD P-SPICE, Model Sim

Tools:

JEE, JavaScript, HTML,JSON

Web Technologies:

PUBLICATIONS FPGA implementation of bilinear interpolation algorithm for CFA demosaicing

Published: Communications and Signal Processing (ICCSP), 2013, 857 - 863 International

Conference April 4, 2013, IEEE

Client: SSN Institutions (Sept 12 - Jul 13)

Role: Lead Developer

EXPERIENCE

• FPGA IMPLEMENTATION OF BILINEAR AND BICUBIC INTERPOLATION

ALGORITHM FOR CFA DEMOSAICING

• Performed comparison of bilinear and bicubic interpolation with the hardware complexity and

computational complexity.

• Analyzed various performance and timing delay tests for bilinear and bicubic interpolation

algorithm.

• Simulated using XILINX and interpolation using VHDL.

Client: SSN Institutions (Sept 11 – Jul 12)

Role: Lead Developer

• FPGA IMPLEMENTATION OF BILINEAR INTERPOLATION ALGORITHM FOR

CFA DEMOSAICING

• Designed and developed the Bilinear interpolation algorithm for a 64*64 image.

• Involved in building the necessary models to facilitate the design.

• Performed performance analysis of Bilinear Interpolation.

Graduate Intern, Role: Project Lead, Developer (Aug 10 - May 11)

• Designed and developed the project INTERFACING STAND ALONE CAN PROTOCOL

• The microchips MCP2515 (stand alone CAN controller) is used as a protocol engine for the

data transfer between 2 FPGA using CAN protocol and controlling device.

Sudharani Karunanidhi – Page 2

• Led the 4 member team during the design and development of the project.

• Assessed the problems and recommended technical solutions to the team.

• Provided technical assistance and reviewed the architecture for the team.

CAD for VLSI, ASIC, Testing, Low Power VLSI, Embedded Systems, Analog IC, Semiconductor

SELECTED

Devices, Digital Signal Processing Integrated Circuits, VLSI Technology.

COURSES

HONOURS Certificate courses in C and C++

•

CISCO Networking certificate course

•

Completed BEC certificate courses

•

Secured distinction in various graduate level courses.

•

ACTIVITIES • Department Secretary for the electronics department during my under graduate studies.

• Technical Manager for events in “ORBITCE”, a national level technical symposium.

REFERENCE Provided upon request

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