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Research Assistant

Location:
United States
Posted:
May 15, 2015

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Resume:

Hello

I am Sagar karalkar pursuing my Ph.D. in Electrical Engineering at UMass

lowell. I came across this opening on internet job board which I would like

to talk more about. I have been working on my research in Skyworks

Solutions Inc at Woburn MA from 2011 to present. I am working here as

Research Assistant in modeling group in determining the scalable model for

small, temperature and DC hemt model with multi device optimization, along

with thermal verification, which can be used in designing of switches and

LNAs.I have worked also worked as VLSI Fabrication instructor in the lab

for undergraduate and graduate course.

Attached is the resume along with the mail for further emphasis on my work

and teaching experience.The best number to reach me at is 978-***-****

<%289**-***-****>. I hope to hear from you sometime soon regarding this

position. Have a nice week ahead.

Best

Sagar Karalkar

SAGAR KARALKAR

*30, 3rd Avenue, Apt #1, Lowell, MA01854*

**************@*****.***

<*************@*****.*** 978-***-*****

*Seeking an opportunity to channel my skills and put forth my best in the

fields of RF, VLSI design/fabrication and semiconductor process technology.*

*EDUCATION*

University of Massachusetts Lowell

Doctor of Philosophy (Ph.D.) in Electrical Engineering,

GPA:3.66

Lowell, *Anticipated May 2015*

University of Massachusetts Lowell

Master of Science (M.S.) in Electrical Engineering,

GPA:3.63

Lowell, *May2009*

University of Mumbai

Bachelor of Engineering (B.E.) in Electronics and Telecommunications, First

Class

India, *May2006*

*Relevant Course work:*

Principle to Solid State Electronics, MMIC, Electromagnetics, VLSI

Fabrication, VLSI Design, Advanced VLSI Design, Introduction to Linear

System Analysis, Wireless Communications, Control Systems, Converged Voice

& Data networks and CCNA, DOE.

*Six Sigma* *Certified*.

*TECHNICAL SKILLS*

*Simulation Tools*: Cadence Virtuoso Design and Layout tool, LVS, DRC,

ADS/IC-CAP/Momentum, HFSS, 2.5D/3D EM Simulations, Matlab Simulink,

Verilog, VHDL, Modelsim 6.5

*Laboratory Experience*: CMOS IC fabrication process, network and spectrum

analyzers, digital and analog oscilloscopes, manual probe station, signal

generators, S-parameter test set up, Tech-Trio Temperature controller,QFI

Thermal IR measuring

*Computer skills*: Software’s - MS Office suite, Minitab, Operating Systems

- Windows, Linux, UNIX, Software Languages - C, C++, Java.

*RESEARCH EXPERIENCE*

*Skyworks Solutions Inc, Woburn, MA, Research

Assistant

2011-Current*

Designed pHEMT Scalable model, to find application in developing GaAs

switches and amplifiers. Innovative Scalability rules for these compact

PHEMTS were obtained by using ADS software and 2.5D/3D EM modelling along

with, comprehensive characterization by extracting parasitic elements

dependencies on finger number, unit gate width.

*Small Signal HEMT Model Extraction*

Extracted a linear model for each device and a better scaling

rule for each parameter. Demonstrated accurate scaling rules for each

intrinsic and extrinsic parameter, by a multi device optimization.

*Temperature Dependent Small Signal HEMT Model Extraction*

Conventionally developed a temperature dependent model of HEMT,

based on individual linear model extraction of parameters like

transconductance, resistance, and inductance at varying temperatures.

Multiple temperature optimization of the model for each parameter revealed

a substantial decrease in extrinsic inductance, a both increase and

decrease in transconductance with increasing temperature. An accurate

temperature dependent linear HEMT can be devised on these grounds.

*Diode and DC HEMT Model Extraction*

Extracted a scalable DC HEMT model by, correlating the scaling

rules for each size dependent parameter of multiple devices. Optimized five

devices with constant unit gate width and varying finger numbers along

with, five devices with the vice versa for both DC HEMT and Diode model.

Achieved accurate scaling for individual parameters and good I-V fitting

for each device, with confirmed scaling rule for self-heating effect. Compared

the experimental data to the theoretical for temperature distribution of

all the devices in linear region, and the results were found to be close

and accurate.

*TEACHING EXPERIENCE*

*University of Massachusetts Lowell, MA, Teaching

Assistant

2010-2013*

Served as an undergraduate instructor to Fundamentals of

Electricity Laboratory and, Principles and History of Radio for

Civil/Mechanical engineers.

Taught VLSI fabrication in Distributed Semiconductors

Instructional and Processing Laboratory funded by Analog Devices Inc. and

Skyworks Solutions Inc, involving oxidation, diffusion, etching,

photolithography, metallization and characterization.

Assisted instructor in VLSI design laboratory (graduate course)

for reviewing the semester projects, and served as a course evaluator for

the Introduction to Circuit Theory (undergraduate course).

*ACADEMIC PROJECTS*

*University of Massachusetts Lowell,

MA

2007-2010*

Advanced VLSI-Design of BIST Logic (Max Jitter, Jitter

Measurement, and Threshold Exceeded) by taking into consideration the

demand for high speed, low power PLL. Implementation of Full Adder (CMOS,

Pass transistor logic), X-OR gate (to detect smallest error), 2’s

complement circuit, 6-bit register and 6-bit counter (The whole design was

carried out on 0.13µm technology).

VLSI Design-Implementation of 4X4 bit Multiplier circuit (The

whole design was carried out on 0.25µm technology).

Solid State Electronics-Study of Effective control of electron

saturation velocity.

Control Systems-Design of upright Inverted Pendulum

Wireless communication-Study of Diversity Combining using Matlab.

*Neutron Electronics Pvt. Ltd,

India

Jan-May2006*

*Smart Management System:*

Utilized the SMS facility provided by cellular phone services to

manage pre-assigned jobs to employees using the Oxygen Gateway software.

Designed the project made it more flexible, time convenient for the

employees on the field and increase employee productivity by appropriate

assignment of next field of work.

*ADDITIONAL PROJECTS*

*Design and implementation of Arithmetic Logic Unit (ALU)*

Implemented full adder based compressor (8-bit) and half adder

based compressor (4-bit) using CMOS and Pass transistor Logic.

Implemented multiplier (8x4) using Wallace tree method.

Implemented multiplexer circuit (2:1) both 8 and 4 bit using

different logic circuit.

Implemented register 8 and 4 bit using D flip flop CMOS positive

edge triggered and Pass transistor logic.

*Design of Butterworth Filer using ADS*

Used a tuner to tuned the characteristics of the parameters to

the desired point on the output and an optimizer to optimize the output and

set to the desired goals.

*Differential Amplifier*

The analog comparator designed was a simple CMOS differential

amplifier whose output was fed into a common source amplifier for high gain.

The amplifier was designed with high open loop gain in order to

switch with the smallest possible difference between the inputs.

*Adder*

Implemented full adder using CMOS, 10T, 8T and Pass transistor

logic to compare the characteristics.

Implemented Ripple carry adder and Carry look ahead adder both 8

and 4 bit using different adder topologies.

*PUBLICATIONS*

Sagar Karalkar, Yu Zhu, Jerod Mason, Dylan Bartle and Kanti Prasad, “Accurate

Scaling Rules for DC HEMT model with Self-heating Effect” IJAEGT, vol3,

issue 4, April 2015

*Sagar Karalkar, *Yu Zhu, Jerod Mason, Dylan Bartle and Kanti Prasad,

“Experimental Determination of Thermal Resistance with Scalable DC HEMT

Model” IJERT, vol 11, Nov 2014.

*Sagar Karalkar, *Yu Zhu, Jerod Mason, Dylan Bartle and Kanti Prasad,“

Mutli-Device Optimization for Scalable DC HEMT Model with Self-Heating

Effect” *ICESC, Nagpur India 2014.*

*Sagar Karalkar, *Yu Zhu, Jerod Mason, Dylan Bartle and Kanti Prasad,

“Temperature

Dependent Linear HEMT Model Extracted with Multi-Temperature

Optimization” *APMC,

Taiwan 2012.*

*Sagar Karalkar, *Yu Zhu, Jerod Mason, Dylan Bartle and Kanti Prasad,

“Multi-device

Optimization for Scalable Linear HEMT Model”

*IEEE, Sarnoff, NY 2012.*

*HONORS AND AWARDS*

ISESC 2014, Best paper, Nagpur,

India

*Jan2014*

Ranked 1st and 2nd in ROBOTICS, Rajiv Gandhi I.O.T and D.J Sanhgvi C.O.E

respectively

*Mar2005*

*MEMBERSHIPS AND ACTIVITIES*

Secretary, Indian Development and Relief Fund, UMass

Lowell

*May2008-2009*

All Rounder, Mavericks Cricket Team, Lowell, MA*

2008-Current*



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