Engineering Training

ANKESH TRIPATHI

Mobile: +918*********, +919*********~ E-Mail: ******@*****.***

JOB OBJECTIVE

Engineering student looking for an opportunity to work in a competitive and challenging environment where I can

enhance my technical and personal attributes and implement them for the betterment of organization and widen my

horizon of thinking.

EDUCATION

• Passed B.Tech(Electronics And Communication Engineering) from St. Margaret Engineering College

affiliated to Rajasthan Technical University(RTU)kota in 2013 with 65.93%.

• 12th passed from CBSE Board, Delhi in 2009 with 78%.

• 10thpassed from CBSE Board, Delhi in 2007 with 78.16%.

TRAINING/EXPERIENCE

• Training Programmes on:

o VLSI DESIGN from DKOP labs pvt. Ltd Noida including digital electronics, Linux and FPGA

basics.

o DOT NET from Bhatia technologies an ISO certified institute in Agra.

Skill test

• Worked With : Verilog, VHDL,

• EDA tools : Modelsim, Xillinx ISE Design Suite

• Operating systems : Windows, Linux

• Knowledge : Digital Electronics

PROJECTS UNDERTAKEN

• Designing of a uart using Verilog.

• Designing of microprocessor using Verilog.

PERSONAL SKILLS AND ACHIEVEMENTS

• Has published a research paper on “Techniques of Underwater Communication” in an international

conference on “VLSI Communication and Networks” held in alwar in 2011.

• Also published a research paper on “Data Transmission In Water”in a national conference on“Recent

Developments In Electronics” held at s.m.e.c, neemrana in 2013.

CORE COMPETENCIES

• Able to Work effectively with group of peoples.

• Confident to work in team. Also worked as a team leader for bringing sponsorship during college fest.

PERSONAL DETAILS

06th of August, 1992

Date of Birth:

Address: G-242, Trans Yamuna Colony, Phase-2, Agra – 282006

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